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      1 /*	$NetBSD: amdgpu_xgmi.h,v 1.3 2021/12/19 10:59:01 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2016 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  */
     24 #ifndef __AMDGPU_XGMI_H__
     25 #define __AMDGPU_XGMI_H__
     26 
     27 #include <drm/task_barrier.h>
     28 #include "amdgpu_psp.h"
     29 
     30 struct amdgpu_hive_info {
     31 	uint64_t		hive_id;
     32 	struct list_head	device_list;
     33 	int number_devices;
     34 	struct mutex hive_lock, reset_lock;
     35 	struct kobject *kobj;
     36 #ifdef CONFIG_SYSFS
     37 	struct device_attribute dev_attr;
     38 #endif
     39 	struct amdgpu_device *adev;
     40 	int pstate; /*0 -- low , 1 -- high , -1 unknown*/
     41 	struct task_barrier tb;
     42 };
     43 
     44 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lock);
     45 int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev);
     46 int amdgpu_xgmi_add_device(struct amdgpu_device *adev);
     47 void amdgpu_xgmi_remove_device(struct amdgpu_device *adev);
     48 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);
     49 int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
     50 		struct amdgpu_device *peer_adev);
     51 int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev);
     52 void amdgpu_xgmi_ras_fini(struct amdgpu_device *adev);
     53 
     54 static inline bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev,
     55 		struct amdgpu_device *bo_adev)
     56 {
     57 	return (adev != bo_adev &&
     58 		adev->gmc.xgmi.hive_id &&
     59 		adev->gmc.xgmi.hive_id == bo_adev->gmc.xgmi.hive_id);
     60 }
     61 
     62 #endif
     63