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    Searched defs:reset_value (Results 1 - 4 of 4) sorted by relevancy

  /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
si_clear.c 471 uint32_t reset_value; local
483 color, &reset_value,
503 vi_dcc_clear_level(sctx, tex, 0, reset_value);
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
si_clear.c 605 uint32_t reset_value; local
611 fb->cbufs[i]->format, color, &reset_value,
642 if (!vi_dcc_get_clear_info(sctx, tex, level, reset_value, &info[num_clears]))
  /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
radv_meta_clear.c 1350 uint32_t* reset_value,
1360 *reset_value = 0x20202020U;
1418 *reset_value |= 0x80808080U;
1421 *reset_value |= 0x40404040U;
1461 uint32_t reset_value; local
1464 &clear_value, &reset_value,
1509 uint32_t reset_value; local
1514 &clear_value, &reset_value,
1527 flush_bits |= radv_clear_dcc(cmd_buffer, iview->image, reset_value);
  /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
radv_meta_clear.c 1685 uint32_t *reset_value, bool *can_avoid_fast_clear_elim)
1696 *reset_value = RADV_DCC_CLEAR_SINGLE;
1699 *reset_value = RADV_DCC_CLEAR_REG;
1769 *reset_value = RADV_DCC_CLEAR_1111;
1771 *reset_value = RADV_DCC_CLEAR_1110;
1774 *reset_value = RADV_DCC_CLEAR_0001;
1776 *reset_value = RADV_DCC_CLEAR_0000;
1819 uint32_t reset_value; local
1821 vi_get_fast_clear_parameters(cmd_buffer->device, iview, &clear_value, &reset_value,
1882 uint32_t reset_value; local
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