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      1 /*	$NetBSD: sa11x0_io_asm.S,v 1.4 2006/06/27 13:58:08 peter Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997 Mark Brinicombe.
      5  * Copyright (c) 1997 Causality Limited.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Mark Brinicombe.
     19  * 4. The name of the company nor the name of the author may be used to
     20  *    endorse or promote products derived from this software without specific
     21  *    prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     24  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     25  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  */
     35 
     36 #include <machine/asm.h>
     37 
     38 /*
     39  * bus_space I/O functions for sa11x0
     40  */
     41 
     42 /*
     43  * read single
     44  */
     45 
     46 ENTRY(sa11x0_bs_r_1)
     47 	ldrb	r0, [r1, r2]
     48 	mov	pc, lr
     49 
     50 ENTRY(sa11x0_bs_r_2)
     51 	ldrh	r0, [r1, r2]
     52 	mov	pc, lr
     53 
     54 ENTRY(sa11x0_bs_r_4)
     55 	ldr	r0, [r1, r2]
     56 	mov	pc, lr
     57 
     58 /*
     59  * write single
     60  */
     61 
     62 ENTRY(sa11x0_bs_w_1)
     63 	strb	r3, [r1, r2]
     64 	mov	pc, lr
     65 
     66 ENTRY(sa11x0_bs_w_2)
     67 	strh	r3, [r1, r2]
     68 	mov	pc, lr
     69 
     70 ENTRY(sa11x0_bs_w_4)
     71 	str	r3, [r1, r2]
     72 	mov	pc, lr
     73 
     74 
     75 /*
     76  * read multiple
     77  */
     78 
     79 ENTRY(sa11x0_bs_rm_1)
     80 	add	r0, r1, r2
     81 	ldr	r2, [sp, #0]
     82 	cmp     r2, #0x00000000
     83 	movle   pc, lr
     84 
     85 sa11x0_bs_rm_1_loop:
     86 	ldrb	r1, [r0]
     87 	subs	r2, r2, #0x00000001
     88 	strb	r1, [r3], #0x0001
     89 	bgt	sa11x0_bs_rm_1_loop
     90 
     91 	mov	pc, lr
     92 
     93 ENTRY(sa11x0_bs_rm_2)
     94 	add	r0, r1, r2
     95 	ldr	r2, [sp, #0]
     96 	cmp	r2, #0x00000000
     97 	movle	pc, lr
     98 
     99 	tst	r2, #0x00000007
    100 	tsteq	r3, #0x00000003
    101 	beq	sa11x0_bs_rm_2_fast
    102 
    103 sa11x0_bs_rm_2_loop:
    104 	ldrh	r1, [r0]
    105 	subs	r2, r2, #0x00000001
    106 	strh	r1, [r3], #0x0002
    107 	bgt	sa11x0_bs_rm_2_loop
    108 
    109 	mov	pc, lr
    110 
    111 sa11x0_bs_rm_2_fast:
    112 	stmfd	sp!, {r4, r5, lr}
    113 
    114 sa11x0_bs_rm_2_fastloop:
    115 	ldrh	r1, [r0]
    116 	ldrh	lr, [r0]
    117 	orr	r1, r1, lr, lsl #16
    118 
    119 	ldrh	r4, [r0]
    120 	ldrh	lr, [r0]
    121 	orr	r4, r4, lr, lsl #16
    122 
    123 	ldrh	r5, [r0]
    124 	ldrh	lr, [r0]
    125 	orr	r5, r5, lr, lsl #16
    126 
    127 	ldrh	ip, [r0]
    128 	ldrh	lr, [r0]
    129 	orr	ip, ip, lr, lsl #16
    130 
    131 	stmia	r3!, {r1, r4, r5, ip}
    132 	subs	r2, r2, #8
    133 	bgt	sa11x0_bs_rm_2_fastloop
    134 
    135 	ldmfd	sp!, {r4, r5, pc}
    136 
    137 
    138 ENTRY(sa11x0_bs_rm_4)
    139 	add	r0, r1, r2
    140 	ldr	r2, [sp, #0]
    141 	cmp	r2, #0x00000000
    142 	movle	pc, lr
    143 
    144 sa11x0_bs_rm_4_loop:
    145 	ldr	r1, [r0]
    146 	subs	r2, r2, #0x00000001
    147 	str	r1, [r3], #0x0004
    148 	bgt	sa11x0_bs_rm_4_loop
    149 
    150 	mov	pc, lr
    151 
    152 /*
    153  * write multiple
    154  */
    155 
    156 ENTRY(sa11x0_bs_wm_1)
    157 	add	r0, r1, r2
    158 	ldr	r2, [sp, #0]
    159 	cmp	r2, #0x00000000
    160 	movle	pc, lr
    161 
    162 sa11x0_wm_1_loop:
    163 	ldrb	r1, [r3], #0x0001
    164 	subs	r2, r2, #0x00000001
    165 	strb	r1, [r0]
    166 	bgt	sa11x0_wm_1_loop
    167 
    168 	mov	pc, lr
    169 
    170 ENTRY(sa11x0_bs_wm_2)
    171 	add	r0, r1, r2
    172 	ldr	r2, [sp, #0]
    173 	cmp	r2, #0x00000000
    174 	movle	pc, lr
    175 
    176 sa11x0_bs_wm_2_loop:
    177 	ldrh	r1, [r3], #0x0002
    178 	subs	r2, r2, #0x00000001
    179 	strh	r1, [r0]
    180 	bgt	sa11x0_bs_wm_2_loop
    181 
    182 	mov	pc, lr
    183 
    184 ENTRY(sa11x0_bs_wm_4)
    185 	add	r0, r1, r2
    186 	ldr	r2, [sp, #0]
    187 	cmp	r2, #0x00000000
    188 	movle	pc, lr
    189 
    190 sa11x0_bs_wm_4_loop:
    191 	ldr	r1, [r3], #0x0004
    192 	subs	r2, r2, #0x00000001
    193 	str	r1, [r0]
    194 	bgt	sa11x0_bs_wm_4_loop
    195 
    196 	mov	pc, lr
    197 
    198 /*
    199  * read region
    200  */
    201 
    202 ENTRY(sa11x0_bs_rr_2)
    203 	add	r0, r1, r2
    204 	ldr	r2, [sp, #0]
    205 	cmp	r2, #0x00000000
    206 	movle	pc, lr
    207 
    208 sa11x0_bs_rr_2_loop:
    209 	ldrh	r1, [r0], #0x0002
    210 	strh	r1, [r3], #0x0002
    211         subs    r2, r2, #0x00000001
    212 	bgt	sa11x0_bs_rr_2_loop
    213 
    214         mov     pc, lr
    215 
    216 /*
    217  * write region
    218  */
    219 
    220 ENTRY(sa11x0_bs_wr_2)
    221 	add	r0, r1, r2
    222 	ldr	r2, [sp, #0]
    223 	cmp	r2, #0x00000000
    224 	movle	pc, lr
    225 
    226 sa11x0_bs_wr_2_loop:
    227 	ldrh	r1, [r3], #0x0002
    228 	strh	r1, [r0], #0x0002
    229 	subs	r2, r2, #0x00000001
    230 	bgt	sa11x0_bs_wr_2_loop
    231 
    232 	mov	pc, lr
    233 
    234 /*
    235  * set region
    236  */
    237 
    238 ENTRY(sa11x0_bs_sr_2)
    239 	add	r0, r1, r2
    240 	ldr	r2, [sp, #0]
    241 	cmp	r2, #0x00000000
    242 	movle	pc, lr
    243 
    244 sa11x0_bs_sr_2_loop:
    245 	strh	r3, [r0], #0x0002
    246 	subs	r2, r2, #0x00000001
    247 	bgt	sa11x0_bs_sr_2_loop
    248 
    249 	mov	pc, lr
    250 
    251 /*
    252  * copy region
    253  */
    254 
    255 ENTRY(sa11x0_bs_c_2)
    256 	add	r0, r1, r2
    257 	ldr	r2, [sp, #0]
    258 	add	r1, r2, r3
    259 	ldr	r2, [sp, #4]
    260 	cmp	r2, #0x00000000
    261 	movle	pc, lr
    262 
    263 	cmp	r0, r1
    264 	blt	sa11x0_bs_c_2_backwards
    265 
    266 sa11x0_bs_cf_2_loop:
    267 	ldrh	r3, [r0], #0x0002
    268 	strh	r3, [r1], #0x0002
    269 	subs	r2, r2, #0x00000001
    270 	bgt	sa11x0_bs_cf_2_loop
    271 
    272 	mov	pc, lr
    273 
    274 sa11x0_bs_c_2_backwards:
    275 	add	r0, r0, r2, lsl #1
    276 	add	r1, r1, r2, lsl #1
    277 	sub	r0, r0, #2
    278 	sub	r1, r1, #2
    279 
    280 sa11x0_bs_cb_2_loop:
    281 	ldrh	r3, [r0], #-2
    282 	strh	r3, [r1], #-2
    283 	subs	r2, r2, #1
    284 	bne	sa11x0_bs_cb_2_loop
    285 
    286 	mov     pc, lr
    287