Home | History | Annotate | Line # | Download | only in xscale 
      1 /*	$NetBSD: beccvar.h,v 1.4 2012/10/14 14:20:57 msaitoh Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #ifndef _BECCVAR_H_
     39 #define	_BECCVAR_H_
     40 
     41 #include <sys/queue.h>
     42 #include <dev/pci/pcivar.h>
     43 
     44 /*
     45  * There are roughly 32 interrupt sources.
     46  */
     47 #define	NIRQ		32
     48 
     49 struct intrhand {
     50 	TAILQ_ENTRY(intrhand) ih_list;	/* link on intrq list */
     51 	int (*ih_func)(void *);		/* handler */
     52 	void *ih_arg;			/* arg for handler */
     53 	int ih_ipl;			/* IPL_* */
     54 	int ih_irq;			/* IRQ number */
     55 };
     56 
     57 struct intrq {
     58 	TAILQ_HEAD(, intrhand) iq_list;	/* handler list */
     59 	struct evcnt iq_ev;		/* event counter */
     60 	int iq_mask;			/* IRQs to mask while handling */
     61 	int iq_levels;			/* IPL_*'s this IRQ has */
     62 	int iq_ist;			/* share type */
     63 };
     64 
     65 struct becc_softc {
     66 	device_t sc_dev;		/* generic device glue */
     67 
     68 	/*
     69 	 * We expect the board-specific front-end to have already mapped
     70 	 * the PCI I/O, memory, and configuration spaces.
     71 	 */
     72 	vaddr_t sc_pci_io_base;		/* I/O window vaddr */
     73 	vaddr_t sc_pci_mem_base[2];	/* MEM window vaddr */
     74 	vaddr_t sc_pci_cfg_base;	/* CFG window vaddr */
     75 
     76 	/*
     77 	 * These define the 2 32M PCI Inbound windows and 1 128M (rev8 & up).
     78 	 */
     79 	struct {
     80 		uint32_t iwin_base;	/* PCI address */
     81 		uint32_t iwin_xlate;	/* local address */
     82 	} sc_iwin[3];
     83 
     84 	/*
     85 	 * Variables that define the 2 32M PCI Outbound windows and
     86 	 * 1 1G (rev8 & up).
     87 	 */
     88 	uint32_t sc_owin_xlate[3];	/* PCI address */
     89 
     90 	/*
     91 	 * This is the PCI address that the Outbound I/O
     92 	 * window maps to.
     93 	 */
     94 	uint32_t sc_ioout_xlate;
     95 
     96 	/* Bus space, DMA, and PCI tags for the PCI bus. */
     97 	struct bus_space sc_pci_iot;
     98 	struct bus_space sc_pci_memt;
     99 	struct arm32_bus_dma_tag sc_pci_dmat;
    100 	struct arm32_pci_chipset sc_pci_chipset;
    101 
    102 	/* DMA window info for PCI DMA. */
    103 	struct arm32_dma_range sc_pci_dma_range[3];
    104 
    105 	/* DMA tag for local DMA. */
    106 	struct arm32_bus_dma_tag sc_local_dmat;
    107 };
    108 
    109 struct becc_attach_args {
    110 	bus_dma_tag_t	ba_dmat;
    111 };
    112 
    113 extern int becc_rev;	/* Set by early bootstrap code */
    114 extern const char *becc_revisions[];
    115 extern void (*becc_hardclock_hook)(void);
    116 
    117 void	becc_calibrate_delay(void);
    118 
    119 void	becc_icu_init(void);
    120 void	becc_intr_init(void);
    121 void	*becc_intr_establish(int, int, int (*)(void *), void *);
    122 void	becc_intr_disestablish(void *);
    123 
    124 void	becc_io_bs_init(bus_space_tag_t, void *);
    125 void	becc_mem_bs_init(bus_space_tag_t, void *);
    126 
    127 void	becc_pci_init(pci_chipset_tag_t, void *);
    128 
    129 void	becc_attach(struct becc_softc *);
    130 
    131 uint32_t becc_pcicore_read(struct becc_softc *, bus_addr_t);
    132 void	becc_pcicore_write(struct becc_softc *, bus_addr_t, uint32_t);
    133 
    134 #endif /* _BECCVAR_H_ */
    135