Home | History | Annotate | Line # | Download | only in dev
      1 /*	$NetBSD: sbicvar.h,v 1.27 2023/12/20 00:40:42 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1990 The Regents of the University of California.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * Van Jacobson of Lawrence Berkeley Laboratory.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. Neither the name of the University nor the names of its contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  *	@(#)scsivar.h	7.1 (Berkeley) 5/8/90
     35  */
     36 #ifndef _SBICVAR_H_
     37 #define _SBICVAR_H_
     38 
     39 #include <sys/callout.h>
     40 
     41 /*
     42  * The largest single request will be MAXPHYS bytes which will require
     43  * at most MAXPHYS/PAGE_SIZE+1 chain elements to describe, i.e. if none of
     44  * the buffer pages are physically contiguous (MAXPHYS/PAGE_SIZE) and the
     45  * buffer is not page aligned (+1).
     46  */
     47 #define	DMAMAXIO	(MAXPHYS/PAGE_SIZE+1)
     48 
     49 struct	dma_chain {
     50 	int	dc_count;
     51 	char	*dc_addr;
     52 };
     53 
     54 /*
     55  * ACB. Holds additional information for each SCSI command Comments: We
     56  * need a separate scsi command block because we may need to overwrite it
     57  * with a request sense command.  Basically, we refrain from fiddling with
     58  * the scsipi_xfer struct (except do the expected updating of return values).
     59  * We'll generally update: xs->{flags,resid,error,sense,status} and
     60  * occasionally xs->retries.
     61  */
     62 struct sbic_acb {
     63 	TAILQ_ENTRY(sbic_acb) chain;
     64 	struct scsipi_xfer *xs;		/* SCSI xfer ctrl block from above */
     65 	int		flags;		/* Status */
     66 #define ACB_FREE	0x00
     67 #define ACB_ACTIVE	0x01
     68 #define ACB_DONE	0x04
     69 #define ACB_BBUF	0x10	/* DMA input needs to be copied from bounce */
     70 #define	ACB_DATAIN	0x20	/* DMA direction flag */
     71 	struct scsipi_generic cmd;	/* SCSI command block */
     72 	int	 clen;
     73 	struct	dma_chain sc_kv;	/* Virtual address of whole DMA */
     74 	struct	dma_chain sc_pa;	/* Physical address of DMA segment */
     75 	u_long	sc_tcnt;		/* number of bytes for this DMA */
     76 	u_char *sc_dmausrbuf;		/* user buffer kva - for bounce copy */
     77 	u_long  sc_dmausrlen;		/* length of bounce copy */
     78 	u_short sc_dmacmd;		/* Internal data for this DMA */
     79 	char *pa_addr;			/* XXXX initial phys addr */
     80 	u_char *sc_usrbufpa;		/* user buffer phys addr */
     81 };
     82 
     83 /*
     84  * Some info about each (possible) target on the SCSI bus.  This should
     85  * probably have been a "per target+lunit" structure, but we'll leave it at
     86  * this for now.  Is there a way to reliably hook it up to sc->fordriver??
     87  */
     88 struct sbic_tinfo {
     89 	int	cmds;		/* #commands processed */
     90 	int	dconns;		/* #disconnects */
     91 	int	touts;		/* #timeouts */
     92 	int	perrs;		/* #parity errors */
     93 	u_char*	bounce;		/* Bounce buffer for this device */
     94 	ushort	lubusy;		/* What local units/subr. are busy? */
     95 	u_char  flags;
     96 	u_char  period;		/* Period suggestion */
     97 	u_char  offset;		/* Offset suggestion */
     98 };
     99 
    100 struct	sbic_softc {
    101 	device_t sc_dev;
    102 	struct	isr sc_isr;
    103 	struct	callout sc_timo_ch;
    104 	struct	target_sync {
    105 		u_char	state;
    106 		u_char	period;
    107 		u_char	offset;
    108 	} sc_sync[8];
    109 	u_char	target;			/* Currently active target */
    110 	u_char  lun;
    111 	struct	scsipi_adapter sc_adapter;
    112 	struct	scsipi_channel sc_channel;
    113 	sbic_regmap_t	sc_sbic;	/* the two SBIC pointers */
    114 	volatile void 	*sc_cregs;	/* driver specific regs */
    115 
    116 	/* Lists of command blocks */
    117 	TAILQ_HEAD(acb_list, sbic_acb) free_list,
    118 				       ready_list,
    119 				       nexus_list;
    120 
    121 	struct sbic_acb *sc_nexus;	/* current command */
    122 	struct sbic_acb sc_acb[8];	/* the real command blocks */
    123 	struct sbic_tinfo sc_tinfo[8];
    124 
    125 	struct	scsipi_xfer *sc_xs;	/* transfer from high level code */
    126 	u_char	sc_flags;
    127 	u_char	sc_scsiaddr;
    128 	u_char	sc_stat[2];
    129 	u_char	sc_msg[7];
    130 	u_long	sc_clkfreq;
    131 	u_long	sc_tcnt;		/* number of bytes transferred */
    132 	u_short sc_dmacmd;		/* used by DMA drivers */
    133 	u_short	sc_dmatimo;		/* DMA timeout */
    134 	u_long	sc_dmamask;		/* DMA valid mem mask */
    135 	struct	dma_chain *sc_cur;
    136 	struct	dma_chain *sc_last;
    137 	int  (*sc_dmago)(struct sbic_softc *, char *, int, int);
    138 	int  (*sc_dmanext)(struct sbic_softc *);
    139 	void (*sc_enintr)(struct sbic_softc *);
    140 	void (*sc_dmastop)(struct sbic_softc *);
    141 	u_short	gtsc_bankmask;		/* GVP specific bank selected */
    142 };
    143 
    144 /* sc_flags */
    145 #define	SBICF_ALIVE	0x01	/* controller initialized */
    146 #define SBICF_DCFLUSH	0x02	/* need flush for overlap after DMA finishes */
    147 #define SBICF_SELECTED	0x04	/* bus is in selected state. */
    148 #define SBICF_ICMD	0x08	/* Immediate command in execution */
    149 #define SBICF_BADDMA	0x10	/* controller can only DMA to ztwobus space */
    150 #define	SBICF_INTR	0x40	/* SBICF interrupt expected */
    151 #define	SBICF_INDMA	0x80	/* not used yet, DMA I/O in progress */
    152 
    153 /* sync states */
    154 #define SYNC_START	0	/* no sync handshake started */
    155 #define SYNC_SENT	1	/* we sent sync request, no answer yet */
    156 #define SYNC_DONE	2	/* target accepted our (or inferior) settings,
    157 				   or it rejected the request and we stay async */
    158 #ifdef DEBUG
    159 #define	DDB_FOLLOW	0x04
    160 #define DDB_IO		0x08
    161 #endif
    162 extern u_char sbic_inhibit_sync[8];
    163 extern int sbic_no_dma;
    164 extern int sbic_clock_override;
    165 
    166 #define	PHASE		0x07		/* mask for psns/pctl phase */
    167 #define	DATA_OUT_PHASE	0x00
    168 #define	DATA_IN_PHASE	0x01
    169 #define	CMD_PHASE	0x02
    170 #define	STATUS_PHASE	0x03
    171 #define	BUS_FREE_PHASE	0x04
    172 #define	ARB_SEL_PHASE	0x05	/* Fuji chip combines arbitration with sel. */
    173 #define	MESG_OUT_PHASE	0x06
    174 #define	MESG_IN_PHASE	0x07
    175 
    176 #define	MSG_CMD_COMPLETE	0x00
    177 #define MSG_EXT_MESSAGE		0x01
    178 #define	MSG_SAVE_DATA_PTR	0x02
    179 #define	MSG_RESTORE_PTR		0x03
    180 #define	MSG_DISCONNECT		0x04
    181 #define	MSG_INIT_DETECT_ERROR	0x05
    182 #define	MSG_ABORT		0x06
    183 #define	MSG_REJECT		0x07
    184 #define	MSG_NOOP		0x08
    185 #define	MSG_PARITY_ERROR	0x09
    186 #define	MSG_BUS_DEVICE_RESET	0x0C
    187 #define	MSG_IDENTIFY		0x80
    188 #define	MSG_IDENTIFY_DR		0xc0	/* (disconnect/reconnect allowed) */
    189 #define	MSG_SYNC_REQ 		0x01
    190 
    191 #define MSG_ISIDENTIFY(x) (x&MSG_IDENTIFY)
    192 #define IFY_TRN		0x20
    193 #define IFY_LUNTRN(x)	(x&0x07)
    194 #define IFY_LUN(x)	(!(x&0x20))
    195 
    196 /* Check if high bit set */
    197 
    198 #define	STS_CHECKCOND	0x02	/* Check Condition (ie., read sense) */
    199 #define	STS_CONDMET	0x04	/* Condition Met (ie., search worked) */
    200 #define	STS_BUSY	0x08
    201 #define	STS_INTERMED	0x10	/* Intermediate status sent */
    202 #define	STS_EXT		0x80	/* Extended status valid */
    203 
    204 
    205 /* States returned by our state machine */
    206 
    207 #define SBIC_STATE_ERROR	-1
    208 #define SBIC_STATE_DONE		0
    209 #define SBIC_STATE_RUNNING	1
    210 #define SBIC_STATE_DISCONNECT	2
    211 
    212 /*
    213  * XXXX
    214  */
    215 struct scsi_fmt_cdb {
    216 	int len;		/* cdb length (in bytes) */
    217 	u_char cdb[28];		/* cdb to use on next read/write */
    218 };
    219 
    220 struct buf;
    221 struct scsipi_xfer;
    222 
    223 void sbic_minphys(struct buf *bp);
    224 void sbic_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, void *);
    225 void sbicinit(struct sbic_softc *);
    226 int  sbicintr(struct sbic_softc *);
    227 #ifdef DEBUG
    228 void sbic_dump(struct sbic_softc *dev);
    229 #endif
    230 
    231 #endif /* _SBICVAR_H_ */
    232