1 /* $NetBSD: sdmmc_io.c,v 1.21 2020/10/17 09:36:45 mlelstv Exp $ */ 2 /* $OpenBSD: sdmmc_io.c,v 1.10 2007/09/17 01:33:33 krw Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* Routines for SD I/O cards. */ 21 22 #include <sys/cdefs.h> 23 __KERNEL_RCSID(0, "$NetBSD: sdmmc_io.c,v 1.21 2020/10/17 09:36:45 mlelstv Exp $"); 24 25 #ifdef _KERNEL_OPT 26 #include "opt_sdmmc.h" 27 #endif 28 29 #include <sys/param.h> 30 #include <sys/kernel.h> 31 #include <sys/malloc.h> 32 #include <sys/proc.h> 33 #include <sys/systm.h> 34 35 #include <dev/sdmmc/sdmmc_ioreg.h> 36 #include <dev/sdmmc/sdmmcchip.h> 37 #include <dev/sdmmc/sdmmcreg.h> 38 #include <dev/sdmmc/sdmmcvar.h> 39 40 #ifdef SDMMC_DEBUG 41 #define DPRINTF(s) do { printf s; } while (0) 42 #else 43 #define DPRINTF(s) do {} while (0) 44 #endif 45 46 struct sdmmc_intr_handler { 47 struct sdmmc_softc *ih_softc; 48 char *ih_name; 49 int (*ih_fun)(void *); 50 void *ih_arg; 51 TAILQ_ENTRY(sdmmc_intr_handler) entry; 52 }; 53 54 static int sdmmc_io_rw_direct(struct sdmmc_softc *, 55 struct sdmmc_function *, int, u_char *, int, bool); 56 static int sdmmc_io_rw_extended(struct sdmmc_softc *, 57 struct sdmmc_function *, int, u_char *, int, int); 58 #if 0 59 static int sdmmc_io_xchg(struct sdmmc_softc *, struct sdmmc_function *, 60 int, u_char *); 61 #endif 62 static void sdmmc_io_reset(struct sdmmc_softc *); 63 static int sdmmc_io_send_op_cond(struct sdmmc_softc *, uint32_t, 64 uint32_t *); 65 66 /* 67 * Initialize SD I/O card functions (before memory cards). The host 68 * system and controller must support card interrupts in order to use 69 * I/O functions. 70 */ 71 int 72 sdmmc_io_enable(struct sdmmc_softc *sc) 73 { 74 uint32_t host_ocr; 75 uint32_t card_ocr; 76 int error; 77 78 SDMMC_LOCK(sc); 79 80 /* Set host mode to SD "combo" card. */ 81 SET(sc->sc_flags, SMF_SD_MODE|SMF_IO_MODE|SMF_MEM_MODE); 82 83 /* Reset I/O functions. */ 84 sdmmc_io_reset(sc); 85 86 /* 87 * Read the I/O OCR value, determine the number of I/O 88 * functions and whether memory is also present (a "combo 89 * card") by issuing CMD5. SD memory-only and MMC cards 90 * do not respond to CMD5. 91 */ 92 error = sdmmc_io_send_op_cond(sc, 0, &card_ocr); 93 if (error) { 94 /* No SDIO card; switch to SD memory-only mode. */ 95 CLR(sc->sc_flags, SMF_IO_MODE); 96 error = 0; 97 goto out; 98 } 99 100 /* Parse the additional bits in the I/O OCR value. */ 101 if (!ISSET(card_ocr, SD_IO_OCR_MEM_PRESENT)) { 102 /* SDIO card without memory (not a "combo card"). */ 103 DPRINTF(("%s: no memory present\n", SDMMCDEVNAME(sc))); 104 CLR(sc->sc_flags, SMF_MEM_MODE); 105 } 106 sc->sc_function_count = SD_IO_OCR_NUM_FUNCTIONS(card_ocr); 107 if (sc->sc_function_count == 0) { 108 /* Useless SDIO card without any I/O functions. */ 109 DPRINTF(("%s: no I/O functions\n", SDMMCDEVNAME(sc))); 110 CLR(sc->sc_flags, SMF_IO_MODE); 111 error = 0; 112 goto out; 113 } 114 card_ocr &= SD_IO_OCR_MASK; 115 116 /* Set the lowest voltage supported by the card and host. */ 117 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 118 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 119 if (error) { 120 aprint_error_dev(sc->sc_dev, 121 "couldn't supply voltage requested by card\n"); 122 goto out; 123 } 124 125 /* Send the new OCR value until all cards are ready. */ 126 error = sdmmc_io_send_op_cond(sc, host_ocr, NULL); 127 if (error) { 128 aprint_error_dev(sc->sc_dev, "couldn't send I/O OCR\n"); 129 goto out; 130 } 131 132 out: 133 SDMMC_UNLOCK(sc); 134 135 return error; 136 } 137 138 /* 139 * Allocate sdmmc_function structures for SD card I/O function 140 * (including function 0). 141 */ 142 void 143 sdmmc_io_scan(struct sdmmc_softc *sc) 144 { 145 struct sdmmc_function *sf0, *sf; 146 int error; 147 int i; 148 149 SDMMC_LOCK(sc); 150 151 sf0 = sdmmc_function_alloc(sc); 152 sf0->number = 0; 153 error = sdmmc_set_relative_addr(sc, sf0); 154 if (error) { 155 aprint_error_dev(sc->sc_dev, "couldn't set I/O RCA\n"); 156 SET(sf0->flags, SFF_ERROR); 157 goto out; 158 } 159 sc->sc_fn0 = sf0; 160 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf0, sf_list); 161 162 /* Go to Data Transfer Mode, if possible. */ 163 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 164 165 /* Verify that the RCA has been set by selecting the card. */ 166 error = sdmmc_select_card(sc, sf0); 167 if (error) { 168 aprint_error_dev(sc->sc_dev, "couldn't select I/O RCA %d\n", 169 sf0->rca); 170 SET(sf0->flags, SFF_ERROR); 171 goto out; 172 } 173 174 for (i = 1; i <= sc->sc_function_count; i++) { 175 sf = sdmmc_function_alloc(sc); 176 sf->number = i; 177 sf->rca = sf0->rca; 178 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 179 } 180 181 out: 182 SDMMC_UNLOCK(sc); 183 } 184 185 /* 186 * Initialize SDIO card functions. 187 */ 188 int 189 sdmmc_io_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 190 { 191 struct sdmmc_function *sf0 = sc->sc_fn0; 192 int error = 0; 193 uint8_t reg; 194 195 SDMMC_LOCK(sc); 196 197 sf->blklen = sdmmc_chip_host_maxblklen(sc->sc_sct, sc->sc_sch); 198 199 if (sf->number == 0) { 200 reg = sdmmc_io_read_1(sf, SD_IO_CCCR_CAPABILITY); 201 if (!(reg & CCCR_CAPS_LSC) || (reg & CCCR_CAPS_4BLS)) { 202 sdmmc_io_write_1(sf, SD_IO_CCCR_BUS_WIDTH, 203 CCCR_BUS_WIDTH_4); 204 sf->width = 4; 205 error = sdmmc_chip_bus_width(sc->sc_sct, sc->sc_sch, 206 sf->width); 207 if (error) 208 aprint_error_dev(sc->sc_dev, 209 "can't change bus width\n"); 210 } 211 212 error = sdmmc_read_cis(sf, &sf->cis); 213 if (error) { 214 aprint_error_dev(sc->sc_dev, "couldn't read CIS\n"); 215 SET(sf->flags, SFF_ERROR); 216 goto out; 217 } 218 219 sdmmc_check_cis_quirks(sf); 220 221 #ifdef SDMMC_DEBUG 222 if (sdmmcdebug) 223 sdmmc_print_cis(sf); 224 #endif 225 226 reg = sdmmc_io_read_1(sf, SD_IO_CCCR_HIGH_SPEED); 227 if (reg & CCCR_HIGH_SPEED_SHS) { 228 reg |= CCCR_HIGH_SPEED_EHS; 229 sdmmc_io_write_1(sf, SD_IO_CCCR_HIGH_SPEED, reg); 230 sf->csd.tran_speed = 50000; /* 50MHz */ 231 232 /* Wait 400KHz x 8 clock */ 233 sdmmc_delay(20); 234 } 235 if (sc->sc_busclk > sf->csd.tran_speed) 236 sc->sc_busclk = sf->csd.tran_speed; 237 error = 238 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk, 239 false); 240 if (error) 241 aprint_error_dev(sc->sc_dev, 242 "can't change bus clock\n"); 243 244 aprint_normal_dev(sc->sc_dev, "%u-bit width,", sf->width); 245 if ((sc->sc_busclk / 1000) != 0) 246 aprint_normal(" %u.%03u MHz\n", 247 sc->sc_busclk / 1000, sc->sc_busclk % 1000); 248 else 249 aprint_normal(" %u KHz\n", sc->sc_busclk % 1000); 250 251 252 } else { 253 reg = sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x000); 254 sf->interface = FBR_STD_FUNC_IF_CODE(reg); 255 if (sf->interface == 0x0f) 256 sf->interface = 257 sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x001); 258 error = sdmmc_read_cis(sf, &sf->cis); 259 if (error) { 260 aprint_error_dev(sc->sc_dev, "couldn't read CIS\n"); 261 SET(sf->flags, SFF_ERROR); 262 goto out; 263 } 264 265 sdmmc_check_cis_quirks(sf); 266 267 #ifdef SDMMC_DEBUG 268 if (sdmmcdebug) 269 sdmmc_print_cis(sf); 270 #endif 271 } 272 273 out: 274 SDMMC_UNLOCK(sc); 275 276 return error; 277 } 278 279 /* 280 * Indicate whether the function is ready to operate. 281 */ 282 static int 283 sdmmc_io_function_ready(struct sdmmc_function *sf) 284 { 285 struct sdmmc_softc *sc = sf->sc; 286 struct sdmmc_function *sf0 = sc->sc_fn0; 287 uint8_t reg; 288 289 if (sf->number == 0) 290 return 1; /* FN0 is always ready */ 291 292 SDMMC_LOCK(sc); 293 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_IOREADY); 294 SDMMC_UNLOCK(sc); 295 return (reg & (1 << sf->number)) != 0; 296 } 297 298 int 299 sdmmc_io_function_enable(struct sdmmc_function *sf) 300 { 301 struct sdmmc_softc *sc = sf->sc; 302 struct sdmmc_function *sf0 = sc->sc_fn0; 303 uint8_t reg; 304 int retry; 305 306 if (sf->number == 0) 307 return 0; /* FN0 is always enabled */ 308 309 SDMMC_LOCK(sc); 310 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 311 SET(reg, (1U << sf->number)); 312 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg); 313 SDMMC_UNLOCK(sc); 314 315 retry = 5; 316 while (!sdmmc_io_function_ready(sf) && retry-- > 0) 317 kpause("pause", false, hz, NULL); 318 return (retry >= 0) ? 0 : ETIMEDOUT; 319 } 320 321 /* 322 * Disable the I/O function. Return zero if the function was 323 * disabled successfully. 324 */ 325 void 326 sdmmc_io_function_disable(struct sdmmc_function *sf) 327 { 328 struct sdmmc_softc *sc = sf->sc; 329 struct sdmmc_function *sf0 = sc->sc_fn0; 330 uint8_t reg; 331 332 if (sf->number == 0) 333 return; /* FN0 is always enabled */ 334 335 SDMMC_LOCK(sc); 336 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 337 CLR(reg, (1U << sf->number)); 338 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg); 339 SDMMC_UNLOCK(sc); 340 } 341 342 static int 343 sdmmc_io_rw_direct(struct sdmmc_softc *sc, struct sdmmc_function *sf, 344 int reg, u_char *datap, int arg, bool toutok) 345 { 346 struct sdmmc_command cmd; 347 int error; 348 349 /* Don't lock */ 350 351 /* Make sure the card is selected. */ 352 error = sdmmc_select_card(sc, sf); 353 if (error) 354 return error; 355 356 arg |= ((sf == NULL ? 0 : sf->number) & SD_ARG_CMD52_FUNC_MASK) << 357 SD_ARG_CMD52_FUNC_SHIFT; 358 arg |= (reg & SD_ARG_CMD52_REG_MASK) << 359 SD_ARG_CMD52_REG_SHIFT; 360 arg |= (*datap & SD_ARG_CMD52_DATA_MASK) << 361 SD_ARG_CMD52_DATA_SHIFT; 362 363 memset(&cmd, 0, sizeof cmd); 364 cmd.c_opcode = SD_IO_RW_DIRECT; 365 cmd.c_arg = arg; 366 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5; 367 if (toutok) 368 cmd.c_flags |= SCF_TOUT_OK; 369 370 error = sdmmc_mmc_command(sc, &cmd); 371 if (error == 0) 372 *datap = SD_R5_DATA(cmd.c_resp); 373 374 if (error && error != ETIMEDOUT) { 375 device_printf(sc->sc_dev, 376 "direct I/O error %d, r=%d p=%p %s\n", 377 error, reg, datap, 378 ISSET(arg, SD_ARG_CMD52_WRITE) ? "write" : "read"); 379 } 380 381 return error; 382 } 383 384 /* 385 * Useful values of `arg' to pass in are either SD_ARG_CMD53_READ or 386 * SD_ARG_CMD53_WRITE. SD_ARG_CMD53_INCREMENT may be ORed into `arg' 387 * to access successive register locations instead of accessing the 388 * same register many times. 389 */ 390 static int 391 sdmmc_io_rw_extended(struct sdmmc_softc *sc, struct sdmmc_function *sf, 392 int reg, u_char *datap, int datalen, int arg) 393 { 394 struct sdmmc_command cmd; 395 int error; 396 397 /* Don't lock */ 398 399 #if 0 400 /* Make sure the card is selected. */ 401 error = sdmmc_select_card(sc, sf); 402 if (error) 403 return error; 404 #endif 405 406 arg |= (((sf == NULL) ? 0 : sf->number) & SD_ARG_CMD53_FUNC_MASK) << 407 SD_ARG_CMD53_FUNC_SHIFT; 408 arg |= (reg & SD_ARG_CMD53_REG_MASK) << 409 SD_ARG_CMD53_REG_SHIFT; 410 arg |= (datalen & SD_ARG_CMD53_LENGTH_MASK) << 411 SD_ARG_CMD53_LENGTH_SHIFT; 412 413 memset(&cmd, 0, sizeof cmd); 414 cmd.c_opcode = SD_IO_RW_EXTENDED; 415 cmd.c_arg = arg; 416 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R5; 417 cmd.c_data = datap; 418 cmd.c_datalen = datalen; 419 cmd.c_blklen = MIN(datalen, sf->blklen); 420 421 if (!ISSET(arg, SD_ARG_CMD53_WRITE)) 422 cmd.c_flags |= SCF_CMD_READ; 423 424 error = sdmmc_mmc_command(sc, &cmd); 425 426 if (error) { 427 device_printf(sc->sc_dev, 428 "extended I/O error %d, r=%d p=%p l=%d %s\n", 429 error, reg, datap, datalen, 430 ISSET(arg, SD_ARG_CMD53_WRITE) ? "write" : "read"); 431 } 432 433 return error; 434 } 435 436 uint8_t 437 sdmmc_io_read_1(struct sdmmc_function *sf, int reg) 438 { 439 uint8_t data = 0; 440 441 /* Don't lock */ 442 443 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 444 SD_ARG_CMD52_READ, false); 445 return data; 446 } 447 448 void 449 sdmmc_io_write_1(struct sdmmc_function *sf, int reg, uint8_t data) 450 { 451 452 /* Don't lock */ 453 454 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 455 SD_ARG_CMD52_WRITE, false); 456 } 457 458 uint16_t 459 sdmmc_io_read_2(struct sdmmc_function *sf, int reg) 460 { 461 uint16_t data = 0; 462 463 /* Don't lock */ 464 465 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 466 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 467 return data; 468 } 469 470 void 471 sdmmc_io_write_2(struct sdmmc_function *sf, int reg, uint16_t data) 472 { 473 474 /* Don't lock */ 475 476 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 477 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 478 } 479 480 uint32_t 481 sdmmc_io_read_4(struct sdmmc_function *sf, int reg) 482 { 483 uint32_t data = 0; 484 485 /* Don't lock */ 486 487 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 488 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 489 return data; 490 } 491 492 void 493 sdmmc_io_write_4(struct sdmmc_function *sf, int reg, uint32_t data) 494 { 495 496 /* Don't lock */ 497 498 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 499 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 500 } 501 502 503 int 504 sdmmc_io_read_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 505 int datalen) 506 { 507 int blocks, bytes, error = 0; 508 509 /* Don't lock */ 510 511 while (datalen >= sf->blklen) { 512 //blocks = imin(datalen / sf->blklen, 513 // SD_ARG_CMD53_LENGTH_MAX); 514 blocks = 1; 515 bytes = blocks * sf->blklen; 516 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 517 bytes, SD_ARG_CMD53_READ); 518 if (error) 519 goto error; 520 data += bytes; 521 datalen -= bytes; 522 } 523 524 if (datalen) 525 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 526 SD_ARG_CMD53_READ); 527 error: 528 return error; 529 } 530 531 int 532 sdmmc_io_write_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 533 int datalen) 534 { 535 int blocks, bytes, error = 0; 536 537 /* Don't lock */ 538 539 while (datalen >= sf->blklen) { 540 //blocks = imin(datalen / sf->blklen, 541 // SD_ARG_CMD53_LENGTH_MAX); 542 blocks = 1; 543 bytes = blocks * sf->blklen; 544 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 545 bytes, SD_ARG_CMD53_WRITE); 546 if (error) 547 goto error; 548 data += bytes; 549 datalen -= bytes; 550 } 551 552 if (datalen) 553 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 554 SD_ARG_CMD53_WRITE); 555 error: 556 return error; 557 } 558 559 560 int 561 sdmmc_io_read_region_1(struct sdmmc_function *sf, int reg, u_char *data, 562 int datalen) 563 { 564 int blocks, bytes, error = 0; 565 566 /* Don't lock */ 567 568 while (datalen >= sf->blklen) { 569 //blocks = imin(datalen / sf->blklen, 570 // SD_ARG_CMD53_LENGTH_MAX); 571 blocks = 1; 572 bytes = blocks * sf->blklen; 573 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 574 bytes, SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 575 if (error) 576 goto error; 577 reg += bytes; 578 data += bytes; 579 datalen -= bytes; 580 } 581 582 if (datalen) 583 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 584 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 585 error: 586 return error; 587 } 588 589 int 590 sdmmc_io_write_region_1(struct sdmmc_function *sf, int reg, u_char *data, 591 int datalen) 592 { 593 int blocks, bytes, error = 0; 594 595 /* Don't lock */ 596 597 while (datalen >= sf->blklen) { 598 //blocks = imin(datalen / sf->blklen, 599 // SD_ARG_CMD53_LENGTH_MAX); 600 blocks = 1; 601 bytes = blocks * sf->blklen; 602 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 603 bytes, SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 604 if (error) 605 goto error; 606 reg += bytes; 607 data += bytes; 608 datalen -= bytes; 609 } 610 611 if (datalen) 612 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 613 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 614 error: 615 return error; 616 } 617 618 #if 0 619 static int 620 sdmmc_io_xchg(struct sdmmc_softc *sc, struct sdmmc_function *sf, 621 int reg, u_char *datap) 622 { 623 624 /* Don't lock */ 625 626 return sdmmc_io_rw_direct(sc, sf, reg, datap, 627 SD_ARG_CMD52_WRITE|SD_ARG_CMD52_EXCHANGE, false); 628 } 629 #endif 630 631 /* 632 * Abort I/O function of the card 633 */ 634 int 635 sdmmc_io_function_abort(struct sdmmc_function *sf) 636 { 637 u_char data = CCCR_CTL_AS(sf->number); 638 639 return sdmmc_io_rw_direct(sf->sc, NULL, SD_IO_CCCR_CTL, &data, 640 SD_ARG_CMD52_WRITE, true); 641 } 642 643 /* 644 * Reset the I/O functions of the card. 645 */ 646 static void 647 sdmmc_io_reset(struct sdmmc_softc *sc) 648 { 649 u_char data = CCCR_CTL_RES; 650 651 if (sdmmc_io_rw_direct(sc, NULL, SD_IO_CCCR_CTL, &data, 652 SD_ARG_CMD52_WRITE, true) == 0) 653 sdmmc_pause(100000, NULL); /* XXX SDMMC_LOCK */ 654 } 655 656 /* 657 * Get or set the card's I/O OCR value (SDIO). 658 */ 659 static int 660 sdmmc_io_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr, u_int32_t *ocrp) 661 { 662 struct sdmmc_command cmd; 663 int error; 664 int retry; 665 666 DPRINTF(("sdmmc_io_send_op_cond: ocr = %#x\n", ocr)); 667 668 /* Don't lock */ 669 670 /* 671 * If we change the OCR value, retry the command until the OCR 672 * we receive in response has the "CARD BUSY" bit set, meaning 673 * that all cards are ready for identification. 674 */ 675 for (retry = 0; retry < 100; retry++) { 676 memset(&cmd, 0, sizeof cmd); 677 cmd.c_opcode = SD_IO_SEND_OP_COND; 678 cmd.c_arg = ocr; 679 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R4 | SCF_TOUT_OK; 680 681 error = sdmmc_mmc_command(sc, &cmd); 682 if (error) 683 break; 684 if (ISSET(MMC_R4(cmd.c_resp), SD_IO_OCR_MEM_READY) || ocr == 0) 685 break; 686 687 error = ETIMEDOUT; 688 sdmmc_pause(10000, NULL); 689 } 690 if (error == 0 && ocrp != NULL) 691 *ocrp = MMC_R4(cmd.c_resp); 692 693 DPRINTF(("sdmmc_io_send_op_cond: error = %d\n", error)); 694 695 return error; 696 } 697 698 /* 699 * Card interrupt handling 700 */ 701 702 void 703 sdmmc_intr_enable(struct sdmmc_function *sf) 704 { 705 struct sdmmc_softc *sc = sf->sc; 706 struct sdmmc_function *sf0 = sc->sc_fn0; 707 uint8_t reg; 708 709 SDMMC_LOCK(sc); 710 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN); 711 reg |= 1 << sf->number; 712 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg); 713 SDMMC_UNLOCK(sc); 714 } 715 716 void 717 sdmmc_intr_disable(struct sdmmc_function *sf) 718 { 719 struct sdmmc_softc *sc = sf->sc; 720 struct sdmmc_function *sf0 = sc->sc_fn0; 721 uint8_t reg; 722 723 SDMMC_LOCK(sc); 724 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN); 725 reg &= ~(1 << sf->number); 726 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg); 727 SDMMC_UNLOCK(sc); 728 } 729 730 /* 731 * Establish a handler for the SDIO card interrupt. Because the 732 * interrupt may be shared with different SDIO functions, multiple 733 * handlers can be established. 734 */ 735 void * 736 sdmmc_intr_establish(device_t dev, int (*fun)(void *), void *arg, 737 const char *name) 738 { 739 struct sdmmc_softc *sc = device_private(dev); 740 struct sdmmc_intr_handler *ih; 741 742 if (sc->sc_sct->card_enable_intr == NULL) 743 return NULL; 744 745 ih = malloc(sizeof *ih, M_DEVBUF, M_WAITOK|M_ZERO); 746 if (ih == NULL) 747 return NULL; 748 749 ih->ih_name = malloc(strlen(name) + 1, M_DEVBUF, M_WAITOK|M_ZERO); 750 if (ih->ih_name == NULL) { 751 free(ih, M_DEVBUF); 752 return NULL; 753 } 754 strlcpy(ih->ih_name, name, strlen(name)); 755 ih->ih_softc = sc; 756 ih->ih_fun = fun; 757 ih->ih_arg = arg; 758 759 mutex_enter(&sc->sc_mtx); 760 if (TAILQ_EMPTY(&sc->sc_intrq)) { 761 sdmmc_intr_enable(sc->sc_fn0); 762 sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 1); 763 } 764 TAILQ_INSERT_TAIL(&sc->sc_intrq, ih, entry); 765 mutex_exit(&sc->sc_mtx); 766 767 return ih; 768 } 769 770 /* 771 * Disestablish the given handler. 772 */ 773 void 774 sdmmc_intr_disestablish(void *cookie) 775 { 776 struct sdmmc_intr_handler *ih = cookie; 777 struct sdmmc_softc *sc = ih->ih_softc; 778 779 if (sc->sc_sct->card_enable_intr == NULL) 780 return; 781 782 mutex_enter(&sc->sc_mtx); 783 TAILQ_REMOVE(&sc->sc_intrq, ih, entry); 784 if (TAILQ_EMPTY(&sc->sc_intrq)) { 785 sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 0); 786 sdmmc_intr_disable(sc->sc_fn0); 787 } 788 mutex_exit(&sc->sc_mtx); 789 790 free(ih->ih_name, M_DEVBUF); 791 free(ih, M_DEVBUF); 792 } 793 794 /* 795 * Call established SDIO card interrupt handlers. The host controller 796 * must call this function from its own interrupt handler to handle an 797 * SDIO interrupt from the card. 798 */ 799 void 800 sdmmc_card_intr(device_t dev) 801 { 802 struct sdmmc_softc *sc = device_private(dev); 803 804 if (sc->sc_sct->card_enable_intr == NULL) 805 return; 806 807 sdmmc_add_task(sc, &sc->sc_intr_task); 808 } 809 810 void 811 sdmmc_intr_task(void *arg) 812 { 813 struct sdmmc_softc *sc = (struct sdmmc_softc *)arg; 814 struct sdmmc_intr_handler *ih; 815 816 mutex_enter(&sc->sc_mtx); 817 TAILQ_FOREACH(ih, &sc->sc_intrq, entry) { 818 /* XXX examine return value and do evcount stuff*/ 819 (void)(*ih->ih_fun)(ih->ih_arg); 820 } 821 mutex_exit(&sc->sc_mtx); 822 823 sdmmc_chip_card_intr_ack(sc->sc_sct, sc->sc_sch); 824 } 825 826 int 827 sdmmc_io_set_blocklen(struct sdmmc_function *sf, 828 int blklen) 829 { 830 struct sdmmc_softc *sc = sf->sc; 831 struct sdmmc_function *sf0 = sc->sc_fn0; 832 int error = EINVAL; 833 834 SDMMC_LOCK(sc); 835 836 if (blklen <= 0 || 837 blklen > sdmmc_chip_host_maxblklen(sc->sc_sct, sc->sc_sch)) 838 goto err; 839 840 sdmmc_io_write_1(sf0, SD_IO_FBR(sf->number) + 841 SD_IO_FBR_BLOCKLEN, blklen & 0xff); 842 sdmmc_io_write_1(sf0, SD_IO_FBR(sf->number) + 843 SD_IO_FBR_BLOCKLEN + 1, (blklen >> 8) & 0xff); 844 845 sf->blklen = blklen; 846 error = 0; 847 848 err: 849 SDMMC_UNLOCK(sc); 850 851 return error; 852 } 853 854
Indexes created Sat Sep 20 22:09:52 GMT 2025