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    Searched defs:seqno (Results 1 - 25 of 33) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/i915/selftests/
igt_spinner.h 26 void *seqno; member in struct:igt_spinner
igt_spinner.c 44 spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
158 *batch++ = rq->fence.seqno;
204 u32 *seqno = spin->seqno + seqno_offset(rq->fence.context); local in function:hws_seqno
206 return READ_ONCE(*seqno);
229 rq->fence.seqno),
232 rq->fence.seqno),
i915_syncmap.c 151 static int check_seqno(struct i915_syncmap *leaf, unsigned int idx, u32 seqno)
159 if (__sync_seqno(leaf)[idx] != seqno) {
160 pr_err("%s: seqno[%d], found %x, expected %x\n",
161 __func__, idx, __sync_seqno(leaf)[idx], seqno);
168 static int check_one(struct i915_syncmap **sync, u64 context, u32 seqno)
172 err = i915_syncmap_set(sync, context, seqno);
194 err = check_seqno((*sync), ilog2((*sync)->bitmap), seqno);
198 if (!i915_syncmap_is_later(sync, context, seqno)) {
199 pr_err("Lookup of first context=%llx/seqno=%x failed!\n",
200 context, seqno);
553 u32 seqno; local in function:igt_syncmap_random
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/vmwgfx/
vmwgfx_marker.c 38 uint32_t seqno; member in struct:vmw_marker
61 uint32_t seqno)
68 marker->seqno = seqno;
95 if (signaled_seqno - marker->seqno > (1 << 30))
136 uint32_t seqno; local in function:vmw_wait_lag
142 seqno = atomic_read(&dev_priv->marker_seq);
146 seqno = marker->seqno;
150 ret = vmw_wait_seqno(dev_priv, false, seqno, true
    [all...]
vmwgfx_irq.c 156 static bool vmw_fifo_idle(struct vmw_private *dev_priv, uint32_t seqno)
166 uint32_t seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE); local in function:vmw_update_seqno
170 if (dev_priv->last_read_seqno != seqno) {
171 dev_priv->last_read_seqno = seqno;
172 vmw_marker_pull(&fifo_state->marker_queue, seqno);
178 uint32_t seqno)
185 if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
190 if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
194 vmw_fifo_idle(dev_priv, seqno))
198 * Then check if the seqno is higher than what we've actuall
    [all...]
vmwgfx_fence.c 101 * a) When a new fence seqno has been submitted by the fifo code.
111 * FENCE_GOAL irq and sets the fence goal seqno to that of the next fence
113 * the subsystem makes sure the fence goal seqno is updated.
115 * The fence goal seqno irq is on as long as there are unsignaled fence
152 u32 seqno = vmw_mmio_read(fifo_mem + SVGA_FIFO_FENCE); local in function:vmw_fence_enable_signaling
153 if (seqno - fence->base.seqno < VMW_FENCE_WRAP)
378 struct vmw_fence_obj *fence, u32 seqno,
384 fman->ctx, seqno);
424 * seqno if needed
508 uint32_t seqno, new_seqno; local in function:__vmw_fences_update
915 const u32 seqno = dev_priv->last_read_seqno; local in function:vmw_fence_obj_signaled_ioctl
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_timeline_types.h 27 u32 seqno; member in struct:intel_timeline
76 * We track the most recent seqno that we wait on in every context so
selftest_timeline.c 169 u32 seqno; member in struct:__igt_sync
181 if (__intel_timeline_sync_is_later(tl, ctx, p->seqno) != p->expected) {
182 pr_err("%s: %s(ctx=%llu, seqno=%u) expected passed %s but failed\n",
183 name, p->name, ctx, p->seqno, yesno(p->expected));
188 ret = __intel_timeline_sync_set(tl, ctx, p->seqno);
366 u32 seqno = prandom_u32_state(&prng); local in function:bench_sync
368 if (!__intel_timeline_sync_is_later(&tl, id, seqno))
369 __intel_timeline_sync_set(&tl, id, seqno);
380 /* Benchmark searching for a known context id and changing the seqno */
496 if (*tl->hwsp_seqno != tl->seqno) {
678 u32 seqno[2]; local in function:live_hwsp_wrap
    [all...]
selftest_hangcheck.c 56 u32 *seqno; member in struct:hang
92 h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
210 *batch++ = rq->fence.seqno;
224 *batch++ = rq->fence.seqno;
237 *batch++ = rq->fence.seqno;
249 *batch++ = rq->fence.seqno;
289 return READ_ONCE(h->seqno[rq->fence.context % (PAGE_SIZE/sizeof(u32))]);
311 rq->fence.seqno),
314 rq->fence.seqno),
607 __func__, rq->fence.seqno, hws_seqno(&h, rq))
    [all...]
  /src/sys/dev/
midisynvar.h 151 u_int seqno; /* allocation index (increases with time) */ member in struct:voice
180 u_int seqno; member in struct:midisyn
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_ids.c 238 unsigned seqno = ++adev->vm_manager.seqno[ring->idx]; local in function:amdgpu_vmid_grab_idle
247 seqno, true);
amdgpu_vm.h 329 unsigned seqno[AMDGPU_MAX_RINGS]; member in struct:amdgpu_vm_manager
  /src/usr.sbin/btattach/
init_csr.c 52 uint16_t seqno; member in struct:bccmd::__anon8f7f6ed60108
94 cmd.message.seqno = htole16(0);
  /src/usr.sbin/timed/timed/
measure.c 63 static n_short seqno = 0; variable in typeref:typename:n_short
135 oicp.icmp_seq = seqno;
212 || icp.icmp_seq < seqno
272 seqno += TRIALS; /* allocate our sequence numbers */
  /src/sys/external/bsd/drm2/include/linux/
dma-fence.h 54 uint64_t seqno; member in struct:dma_fence
172 printf("fence %"PRIu64"@%"PRIu64": ", f->context, f->seqno);
  /src/sys/net/
ppp-deflate.c 64 int seqno; member in struct:deflate_state
208 state->seqno = 0;
223 state->seqno = 0;
272 wptr[0] = state->seqno >> 8;
273 wptr[1] = state->seqno;
283 ++state->seqno;
425 state->seqno = 0;
441 state->seqno = 0;
488 if (seq != state->seqno) {
491 state->unit, seq, state->seqno);
    [all...]
bsd-comp.c 93 uint16_t seqno; /* sequence # of next packet */ member in struct:bsd_db
294 db->seqno = 0;
541 *wptr++ = db->seqno >> 8;
542 *wptr++ = db->seqno;
544 ++db->seqno;
691 db->seqno++;
837 if (seq != db->seqno) {
840 db->unit, seq, db->seqno - 1);
843 ++db->seqno;
923 printf("max_ent=0x%x explen=%d seqno=%d\n"
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_request.h 57 rq__->fence.context, rq__->fence.seqno, \
239 * If we need to access the timeline's seqno for this request in
417 * has the associated breadcrumb value of rq->fence.seqno, when the HW
422 u32 seqno; local in function:hwsp_seqno
425 seqno = __hwsp_seqno(rq);
428 return seqno;
433 return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno - 1);
513 return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno);
518 rq->hwsp_seqno = (u32 *)&rq->fence.seqno; /* decouple from HWSP */
i915_request.c 248 * sent us the seqno + interrupt, so use the position
461 * is kept in seqno/ring order.
630 u32 seqno; local in function:__i915_request_create
660 * old engine and seqno), the lookup is complete and reports NULL.
661 * If we decide the request is not completed (new engine or seqno),
692 ret = intel_timeline_get_seqno(tl, rq, &seqno);
697 rq->fence.seqno = seqno;
734 * should we detect the updated seqno part-way through the
860 u32 seqno)
    [all...]
i915_gpu_error.h 54 u32 seqno; member in struct:i915_request_coredump
  /src/usr.sbin/isibootd/
isibootd.c 72 uint16_t seqno; member in struct:frame
  /src/sys/external/mit/xen-include-public/dist/xen/include/public/xsm/
flask_op.h 61 uint32_t seqno; member in struct:xen_flask_access
  /src/sys/dev/pci/
if_ale.c 1461 uint32_t length, prod, seqno, status; local in function:ale_rxeof
1483 seqno = ALE_RX_SEQNO(le32toh(rs->seqno));
1484 if (sc->ale_cdata.ale_rx_seqno != seqno) {
1500 seqno, sc->ale_cdata.ale_rx_seqno);
  /src/sys/dev/bluetooth/
bcsp.c 1214 uint32_t seqno = (rxack - 1) & BCSP_FLAGS_SEQ_MASK; local in function:bcsp_signal_rxack
1224 if (BCSP_FLAGS_SEQ(hdrp->flags) == seqno) {
bth5.c 1258 uint32_t seqno = (rxack - 1) & BTH5_FLAGS_SEQ_MASK; local in function:bth5_signal_rxack
1268 if (BTH5_FLAGS_SEQ(hdrp->flags) == seqno) {

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