| /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
| kfd_pm4_headers.h | 76 uint32_t sh_mem_bases; member in struct:pm4_map_process
126 uint32_t sh_mem_bases; member in struct:pm4_map_process_scratch_kv
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| kfd_pm4_headers_vi.h | 173 uint32_t sh_mem_bases; member in struct:pm4_mes_map_process
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| kfd_pm4_headers_ai.h | 161 uint32_t sh_mem_bases; member in struct:pm4_mes_map_process
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| kfd_priv.h | 568 uint32_t sh_mem_bases; member in struct:qcm_process_device
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gfx_v10_0.c | 1602 uint32_t sh_mem_bases; local in function:gfx_v10_0_init_compute_vmid
1610 sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
1617 WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);
1755 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
1757 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
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| amdgpu_gfx_v7_0.c | 1867 uint32_t sh_mem_bases; local in function:gfx_v7_0_init_compute_vmid
1875 sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
1886 WREG32(mmSH_MEM_BASES, sh_mem_bases);
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| amdgpu_gfx_v8_0.c | 3688 uint32_t sh_mem_bases; local in function:gfx_v8_0_init_compute_vmid
3696 sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
3712 WREG32(mmSH_MEM_BASES, sh_mem_bases);
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| amdgpu_gfx_v9_0.c | 2406 uint32_t sh_mem_bases; local in function:gfx_v9_0_init_compute_vmid
2414 sh_mem_bases = DEFAULT_SH_MEM_BASES | (DEFAULT_SH_MEM_BASES << 16);
2425 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, sh_mem_bases);
2506 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
2508 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
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