1 /* $NetBSD: dvo_sil164.c,v 1.2 2021/12/18 23:45:29 riastradh Exp $ */ 2 3 /************************************************************************** 4 5 Copyright 2006 Dave Airlie 6 7 All Rights Reserved. 8 9 Permission is hereby granted, free of charge, to any person obtaining a 10 copy of this software and associated documentation files (the 11 "Software"), to deal in the Software without restriction, including 12 without limitation the rights to use, copy, modify, merge, publish, 13 distribute, sub license, and/or sell copies of the Software, and to 14 permit persons to whom the Software is furnished to do so, subject to 15 the following conditions: 16 17 The above copyright notice and this permission notice (including the 18 next paragraph) shall be included in all copies or substantial portions 19 of the Software. 20 21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 22 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 24 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 25 ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 26 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 27 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 28 29 **************************************************************************/ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: dvo_sil164.c,v 1.2 2021/12/18 23:45:29 riastradh Exp $"); 33 34 #include "intel_display_types.h" 35 #include "intel_dvo_dev.h" 36 37 #define SIL164_VID 0x0001 38 #define SIL164_DID 0x0006 39 40 #define SIL164_VID_LO 0x00 41 #define SIL164_VID_HI 0x01 42 #define SIL164_DID_LO 0x02 43 #define SIL164_DID_HI 0x03 44 #define SIL164_REV 0x04 45 #define SIL164_RSVD 0x05 46 #define SIL164_FREQ_LO 0x06 47 #define SIL164_FREQ_HI 0x07 48 49 #define SIL164_REG8 0x08 50 #define SIL164_8_VEN (1<<5) 51 #define SIL164_8_HEN (1<<4) 52 #define SIL164_8_DSEL (1<<3) 53 #define SIL164_8_BSEL (1<<2) 54 #define SIL164_8_EDGE (1<<1) 55 #define SIL164_8_PD (1<<0) 56 57 #define SIL164_REG9 0x09 58 #define SIL164_9_VLOW (1<<7) 59 #define SIL164_9_MSEL_MASK (0x7<<4) 60 #define SIL164_9_TSEL (1<<3) 61 #define SIL164_9_RSEN (1<<2) 62 #define SIL164_9_HTPLG (1<<1) 63 #define SIL164_9_MDI (1<<0) 64 65 #define SIL164_REGC 0x0c 66 67 struct sil164_priv { 68 //I2CDevRec d; 69 bool quiet; 70 }; 71 72 #define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr)) 73 74 static bool sil164_readb(struct intel_dvo_device *dvo, int addr, u8 *ch) 75 { 76 struct sil164_priv *sil = dvo->dev_priv; 77 struct i2c_adapter *adapter = dvo->i2c_bus; 78 u8 out_buf[2]; 79 u8 in_buf[2]; 80 81 struct i2c_msg msgs[] = { 82 { 83 .addr = dvo->slave_addr, 84 .flags = 0, 85 .len = 1, 86 .buf = out_buf, 87 }, 88 { 89 .addr = dvo->slave_addr, 90 .flags = I2C_M_RD, 91 .len = 1, 92 .buf = in_buf, 93 } 94 }; 95 96 out_buf[0] = addr; 97 out_buf[1] = 0; 98 99 if (i2c_transfer(adapter, msgs, 2) == 2) { 100 *ch = in_buf[0]; 101 return true; 102 } 103 104 if (!sil->quiet) { 105 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n", 106 addr, adapter->name, dvo->slave_addr); 107 } 108 return false; 109 } 110 111 static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, u8 ch) 112 { 113 struct sil164_priv *sil = dvo->dev_priv; 114 struct i2c_adapter *adapter = dvo->i2c_bus; 115 u8 out_buf[2]; 116 struct i2c_msg msg = { 117 .addr = dvo->slave_addr, 118 .flags = 0, 119 .len = 2, 120 .buf = out_buf, 121 }; 122 123 out_buf[0] = addr; 124 out_buf[1] = ch; 125 126 if (i2c_transfer(adapter, &msg, 1) == 1) 127 return true; 128 129 if (!sil->quiet) { 130 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n", 131 addr, adapter->name, dvo->slave_addr); 132 } 133 134 return false; 135 } 136 137 /* Silicon Image 164 driver for chip on i2c bus */ 138 static bool sil164_init(struct intel_dvo_device *dvo, 139 struct i2c_adapter *adapter) 140 { 141 /* this will detect the SIL164 chip on the specified i2c bus */ 142 struct sil164_priv *sil; 143 unsigned char ch; 144 145 sil = kzalloc(sizeof(struct sil164_priv), GFP_KERNEL); 146 if (sil == NULL) 147 return false; 148 149 dvo->i2c_bus = adapter; 150 dvo->dev_priv = sil; 151 sil->quiet = true; 152 153 if (!sil164_readb(dvo, SIL164_VID_LO, &ch)) 154 goto out; 155 156 if (ch != (SIL164_VID & 0xff)) { 157 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n", 158 ch, adapter->name, dvo->slave_addr); 159 goto out; 160 } 161 162 if (!sil164_readb(dvo, SIL164_DID_LO, &ch)) 163 goto out; 164 165 if (ch != (SIL164_DID & 0xff)) { 166 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n", 167 ch, adapter->name, dvo->slave_addr); 168 goto out; 169 } 170 sil->quiet = false; 171 172 DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n"); 173 return true; 174 175 out: 176 kfree(sil); 177 return false; 178 } 179 180 static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo) 181 { 182 u8 reg9; 183 184 sil164_readb(dvo, SIL164_REG9, ®9); 185 186 if (reg9 & SIL164_9_HTPLG) 187 return connector_status_connected; 188 else 189 return connector_status_disconnected; 190 } 191 192 static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo, 193 struct drm_display_mode *mode) 194 { 195 return MODE_OK; 196 } 197 198 static void sil164_mode_set(struct intel_dvo_device *dvo, 199 const struct drm_display_mode *mode, 200 const struct drm_display_mode *adjusted_mode) 201 { 202 /* As long as the basics are set up, since we don't have clock 203 * dependencies in the mode setup, we can just leave the 204 * registers alone and everything will work fine. 205 */ 206 /* recommended programming sequence from doc */ 207 /*sil164_writeb(sil, 0x08, 0x30); 208 sil164_writeb(sil, 0x09, 0x00); 209 sil164_writeb(sil, 0x0a, 0x90); 210 sil164_writeb(sil, 0x0c, 0x89); 211 sil164_writeb(sil, 0x08, 0x31);*/ 212 /* don't do much */ 213 return; 214 } 215 216 /* set the SIL164 power state */ 217 static void sil164_dpms(struct intel_dvo_device *dvo, bool enable) 218 { 219 int ret; 220 unsigned char ch; 221 222 ret = sil164_readb(dvo, SIL164_REG8, &ch); 223 if (ret == false) 224 return; 225 226 if (enable) 227 ch |= SIL164_8_PD; 228 else 229 ch &= ~SIL164_8_PD; 230 231 sil164_writeb(dvo, SIL164_REG8, ch); 232 return; 233 } 234 235 static bool sil164_get_hw_state(struct intel_dvo_device *dvo) 236 { 237 int ret; 238 unsigned char ch; 239 240 ret = sil164_readb(dvo, SIL164_REG8, &ch); 241 if (ret == false) 242 return false; 243 244 if (ch & SIL164_8_PD) 245 return true; 246 else 247 return false; 248 } 249 250 static void sil164_dump_regs(struct intel_dvo_device *dvo) 251 { 252 u8 val; 253 254 sil164_readb(dvo, SIL164_FREQ_LO, &val); 255 DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val); 256 sil164_readb(dvo, SIL164_FREQ_HI, &val); 257 DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val); 258 sil164_readb(dvo, SIL164_REG8, &val); 259 DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val); 260 sil164_readb(dvo, SIL164_REG9, &val); 261 DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val); 262 sil164_readb(dvo, SIL164_REGC, &val); 263 DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val); 264 } 265 266 static void sil164_destroy(struct intel_dvo_device *dvo) 267 { 268 struct sil164_priv *sil = dvo->dev_priv; 269 270 if (sil) { 271 kfree(sil); 272 dvo->dev_priv = NULL; 273 } 274 } 275 276 const struct intel_dvo_dev_ops sil164_ops = { 277 .init = sil164_init, 278 .detect = sil164_detect, 279 .mode_valid = sil164_mode_valid, 280 .mode_set = sil164_mode_set, 281 .dpms = sil164_dpms, 282 .get_hw_state = sil164_get_hw_state, 283 .dump_regs = sil164_dump_regs, 284 .destroy = sil164_destroy, 285 }; 286
Indexes created Sun Sep 21 15:09:59 GMT 2025