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      1 /*	$NetBSD: dma.c,v 1.29 2023/01/06 10:28:28 tsutsui Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995 Leo Weppelman.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 /*
     29  * This file contains special code dealing with the DMA interface
     30  * on the Atari ST.
     31  *
     32  * The DMA circuitry requires some special treatment for the peripheral
     33  * devices which make use of the ST's DMA feature (the hard disk and the
     34  * floppy drive).
     35  * All devices using DMA need mutually exclusive access and can follow some
     36  * standard pattern which will be provided in this file.
     37  *
     38  * The file contains the following entry points:
     39  *
     40  *	st_dmagrab:	ensure exclusive access to the DMA circuitry
     41  *	st_dmafree:	free exclusive access to the DMA circuitry
     42  *	st_dmawanted:	somebody is queued waiting for DMA-access
     43  *	dmaint:		DMA interrupt routine, switches to the current driver
     44  *	st_dmaaddr_set:	specify 24 bit RAM address
     45  *	st_dmaaddr_get:	get address of last DMA-op
     46  *	st_dmacomm:	program DMA, flush FIFO first
     47  */
     48 
     49 #include <sys/cdefs.h>
     50 __KERNEL_RCSID(0, "$NetBSD: dma.c,v 1.29 2023/01/06 10:28:28 tsutsui Exp $");
     51 
     52 #include <sys/param.h>
     53 #include <sys/systm.h>
     54 #include <sys/kernel.h>
     55 #include <sys/proc.h>
     56 #include <sys/queue.h>
     57 
     58 #include <machine/cpu.h>
     59 #include <machine/iomap.h>
     60 #include <machine/dma.h>
     61 #include <machine/intr.h>
     62 
     63 #define	NDMA_DEV	10	/* Max 2 floppy's, 8 hard-disks		*/
     64 typedef struct dma_entry {
     65 	TAILQ_ENTRY(dma_entry)	entries;	/* List pointers	   */
     66 	void		(*call_func)(void *);	/* Call when lock granted  */
     67 	void		(*int_func)(void *);	/* Call on DMA interrupt   */
     68 	void		*softc;			/* Arg. to int_func	   */
     69 	int		*lock_stat;		/* status of DMA lock	   */
     70 } DMA_ENTRY;
     71 
     72 /*
     73  * Preallocated entries. An allocator seem an overkill here.
     74  */
     75 static	DMA_ENTRY dmatable[NDMA_DEV];	/* preallocated entries		*/
     76 
     77 /*
     78  * Heads of free and active lists:
     79  */
     80 static  TAILQ_HEAD(freehead, dma_entry)	dma_free;
     81 static  TAILQ_HEAD(acthead, dma_entry)	dma_active;
     82 
     83 static	int	must_init = 1;		/* Must initialize		*/
     84 
     85 int	cdmaint(void *, int);
     86 
     87 static	void	st_dma_init(void);
     88 
     89 static void
     90 st_dma_init(void)
     91 {
     92 	int i;
     93 
     94 	TAILQ_INIT(&dma_free);
     95 	TAILQ_INIT(&dma_active);
     96 
     97 	for (i = 0; i < NDMA_DEV; i++)
     98 		TAILQ_INSERT_HEAD(&dma_free, &dmatable[i], entries);
     99 
    100 	if (intr_establish(7, USER_VEC, 0, cdmaint, NULL) == NULL)
    101 		panic("st_dma_init: Can't establish interrupt");
    102 }
    103 
    104 int
    105 st_dmagrab(dma_farg int_func, dma_farg call_func, void *softc, int *lock_stat,
    106     int rcaller, kmutex_t *interlock)
    107 {
    108 	int s;
    109 	DMA_ENTRY *req;
    110 
    111 	if (must_init) {
    112 		st_dma_init();
    113 		must_init = 0;
    114 	}
    115 	*lock_stat = DMA_LOCK_REQ;
    116 
    117 	s = splhigh();
    118 
    119 	/*
    120 	 * Create a request...
    121 	 */
    122 	if ((req = TAILQ_FIRST(&dma_free)) == NULL)
    123 		panic("st_dmagrab: Too many outstanding requests");
    124 	TAILQ_REMOVE(&dma_free, req, entries);
    125 	req->call_func = call_func;
    126 	req->int_func  = int_func;
    127 	req->softc     = softc;
    128 	req->lock_stat = lock_stat;
    129 	TAILQ_INSERT_TAIL(&dma_active, req, entries);
    130 
    131 	if (TAILQ_FIRST(&dma_active) != req) {
    132 		if (call_func == NULL) {
    133 			do {
    134 				mtsleep(&dma_active, PRIBIO, "dmalck", 0,
    135 				    interlock);
    136 			} while (*req->lock_stat != DMA_LOCK_GRANT);
    137 			splx(s);
    138 			return 1;
    139 		}
    140 		splx(s);
    141 		return 0;
    142 	}
    143 	splx(s);
    144 
    145 	/*
    146 	 * We're at the head of the queue, ergo: we got the lock.
    147 	 */
    148 	*lock_stat = DMA_LOCK_GRANT;
    149 
    150 	if (rcaller || (call_func == NULL)) {
    151 		/*
    152 		 * Just return to caller immediately without going
    153 		 * through 'call_func' first.
    154 		 */
    155 		return 1;
    156 	}
    157 
    158 	(*call_func)(softc);	/* Call followup function		*/
    159 	return 0;
    160 }
    161 
    162 void
    163 st_dmafree(void *softc, int *lock_stat)
    164 {
    165 	int s;
    166 	DMA_ENTRY *req;
    167 
    168 	s = splhigh();
    169 
    170 	/*
    171 	 * Some validity checks first.
    172 	 */
    173 	if ((req = TAILQ_FIRST(&dma_active)) == NULL)
    174 		panic("st_dmafree: empty active queue");
    175 	if (req->softc != softc)
    176 		printf("Caller of st_dmafree is not lock-owner!\n");
    177 
    178 	/*
    179 	 * Clear lock status, move request from active to free queue.
    180 	 */
    181 	*lock_stat = 0;
    182 	TAILQ_REMOVE(&dma_active, req, entries);
    183 	TAILQ_INSERT_HEAD(&dma_free, req, entries);
    184 
    185 	if ((req = TAILQ_FIRST(&dma_active)) != NULL) {
    186 		*req->lock_stat = DMA_LOCK_GRANT;
    187 
    188 		if (req->call_func == NULL)
    189 			wakeup((void *)&dma_active);
    190 		else {
    191 			/*
    192 			 * Call next request through softint handler.
    193 			 * This avoids spl-conflicts.
    194 			 */
    195 			add_sicallback((si_farg)req->call_func, req->softc, 0);
    196 		}
    197 	}
    198 	splx(s);
    199 }
    200 
    201 int
    202 st_dmawanted(void)
    203 {
    204 
    205 	return TAILQ_NEXT(TAILQ_FIRST(&dma_active), entries) != NULL;
    206 }
    207 
    208 int
    209 cdmaint(void *unused, int sr)
    210 	/* sr:	 sr at time of interrupt */
    211 {
    212 	dma_farg int_func;
    213 	void *softc;
    214 
    215 	if (TAILQ_FIRST(&dma_active) != NULL) {
    216 		/*
    217 		 * Due to the logic of the ST-DMA chip, it is not possible to
    218 		 * check for stray interrupts here...
    219 		 */
    220 		int_func = TAILQ_FIRST(&dma_active)->int_func;
    221 		softc    = TAILQ_FIRST(&dma_active)->softc;
    222 		add_sicallback((si_farg)int_func, softc, 0);
    223 		return 1;
    224 	}
    225 	return 0;
    226 }
    227 
    228 /*
    229  * Setup address for DMA-transfer.
    230  * Note: The order _is_ important!
    231  */
    232 void
    233 st_dmaaddr_set(void *address)
    234 {
    235 	u_long ad = (u_long)address;
    236 
    237 	DMA->dma_addr[AD_LOW ] = (ad     ) & 0xff;
    238 	DMA->dma_addr[AD_MID ] = (ad >> 8) & 0xff;
    239 	DMA->dma_addr[AD_HIGH] = (ad >>16) & 0xff;
    240 }
    241 
    242 /*
    243  * Get address from DMA unit.
    244  */
    245 u_long
    246 st_dmaaddr_get(void)
    247 {
    248 	u_long ad = 0;
    249 
    250 	ad  = (DMA->dma_addr[AD_LOW ] & 0xff);
    251 	ad |= (DMA->dma_addr[AD_MID ] & 0xff) << 8;
    252 	ad |= (DMA->dma_addr[AD_HIGH] & 0xff) <<16;
    253 	return ad;
    254 }
    255 
    256 /*
    257  * Program the DMA-controller to transfer 'nblk' blocks of 512 bytes.
    258  * The DMA_WRBIT trick flushes the FIFO before doing DMA.
    259  */
    260 void
    261 st_dmacomm(int mode, int nblk)
    262 {
    263 
    264 	DMA->dma_mode = mode;
    265 	DMA->dma_mode = mode ^ DMA_WRBIT;
    266 	DMA->dma_mode = mode;
    267 	DMA->dma_data = nblk;
    268 	delay(2);	/* Needed for Falcon */
    269 	DMA->dma_mode = DMA_SCREG | (mode & DMA_WRBIT);
    270 }
    271