| /src/usr.sbin/emcfanctl/ |
| emcfanctl.c | 215 int start_reg = 0xff, end_reg, value, tvalue, instance; local in function:main
325 start_reg = EMCFAN_2101_CHIP_CONFIG;
329 start_reg = EMCFAN_CHIP_CONFIG;
332 start_reg = EMCFAN_CHIP_CONFIG_2;
340 error = output_emcfan_smbusto(fd, product_id, product_family, start_reg, instance, jsonify, debug);
353 error = emcfan_rmw_register(fd, start_reg, 0, smbus_timeout, __arraycount(smbus_timeout), tvalue, debug);
379 start_reg = end_reg = 0x00;
381 start_reg = (uint8_t)strtoi(argv[3], NULL, 0, 0, 0xff, &error);
383 start_reg = emcfan_reg_by_name(product_id, product_family, argv[3]);
384 if (start_reg == -1)
[all...] |
| /src/sys/external/bsd/drm/dist/shared-core/ |
| radeon_cs.c | 348 uint32_t hdr, num_dw, start_reg, end_reg, reg; local in function:r600_cs_packet3
490 start_reg = (ib_chunk->kdata[offset_dw + 1] << 2) + R600_SET_CONFIG_REG_OFFSET;
491 end_reg = 4 * (num_dw - 2) + start_reg - 4;
492 if ((start_reg < R600_SET_CONFIG_REG_OFFSET) ||
493 (start_reg >= R600_SET_CONFIG_REG_END) ||
498 reg = start_reg + (4 * i);
516 start_reg = ib_chunk->kdata[offset_dw + 1] << 2;
517 start_reg += R600_SET_CONTEXT_REG_OFFSET;
518 end_reg = 4 * (num_dw - 2) + start_reg - 4;
519 if ((start_reg < R600_SET_CONTEXT_REG_OFFSET) |
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen_cs.c | 1809 unsigned start_reg, end_reg, reg; local in function:evergreen_packet3_check
2330 start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;
2331 end_reg = 4 * pkt->count + start_reg - 4;
2332 if ((start_reg < PACKET3_SET_CONFIG_REG_START) ||
2333 (start_reg >= PACKET3_SET_CONFIG_REG_END) ||
2338 for (reg = start_reg, idx++; reg <= end_reg; reg += 4, idx++) {
2347 start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START;
2348 end_reg = 4 * pkt->count + start_reg - 4;
2349 if ((start_reg < PACKET3_SET_CONTEXT_REG_START) ||
2350 (start_reg >= PACKET3_SET_CONTEXT_REG_END) |
3382 u32 start_reg, end_reg, reg, i; local in function:evergreen_vm_packet3_check
[all...] |
| radeon_r600_cs.c | 1637 unsigned start_reg, end_reg, reg; local in function:r600_packet3_check
1912 start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_OFFSET;
1913 end_reg = 4 * pkt->count + start_reg - 4;
1914 if ((start_reg < PACKET3_SET_CONFIG_REG_OFFSET) ||
1915 (start_reg >= PACKET3_SET_CONFIG_REG_END) ||
1921 reg = start_reg + (4 * i);
1928 start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_OFFSET;
1929 end_reg = 4 * pkt->count + start_reg - 4;
1930 if ((start_reg < PACKET3_SET_CONTEXT_REG_OFFSET) ||
1931 (start_reg >= PACKET3_SET_CONTEXT_REG_END) |
[all...] |
| radeon_si.c | 4488 u32 start_reg, reg, i; local in function:si_vm_packet3_cp_dma_check
4495 start_reg = idx_value << 2;
4497 reg = start_reg;
4504 reg = start_reg + (4 * i);
4516 start_reg = ib[idx + 2];
4518 reg = start_reg;
4525 reg = start_reg + (4 * i);
4543 u32 start_reg, end_reg, reg, i; local in function:si_vm_packet3_gfx_check
4601 start_reg = ib[idx + 1] * 4;
4603 if (!si_vm_reg_valid(start_reg))
4661 u32 start_reg, reg, i; local in function:si_vm_packet3_compute_check
[all...] |
