| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_reg.h | 225 unsigned subnr:5; /* :1 in align16 */ member in struct:brw_reg::__anon2400::__anon2401
384 * \param subnr register sub number
397 unsigned subnr,
423 reg.subnr = subnr * type_sz(type);
427 * set swizzle and writemask to W, as the lower bits of subnr will
444 brw_vec16_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
448 subnr,
461 brw_vec8_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
465 subnr,
[all...] |
| test_eu_validate.cpp | 1553 unsigned subnr; member in struct:__anon2425
1557 #define INST(dst_type, src0_type, src1_type, dst_stride, read_acc, subnr, \
1565 subnr, \
1604 brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].subnr);
2063 unsigned subnr; member in struct:__anon2433
2087 brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, move[i].subnr);
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_reg.h | 225 unsigned subnr:5; /* :1 in align16 */ member in struct:brw_reg::__anon4740::__anon4741
391 * \param subnr register sub number
404 unsigned subnr,
430 reg.subnr = subnr * type_sz(type);
434 * set swizzle and writemask to W, as the lower bits of subnr will
451 brw_vec16_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
455 subnr,
468 brw_vec8_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
472 subnr,
[all...] |
| test_eu_validate.cpp | 1147 unsigned subnr; member in struct:__anon4761
1151 #define INST(dst_type, src0_type, src1_type, dst_stride, read_acc, subnr, \
1159 subnr, \
1198 brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].subnr);
1657 unsigned subnr; member in struct:__anon4769
1681 brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, move[i].subnr);
|
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/ |
| brw_eu.h | 569 unsigned dest_subreg_nr:3; /* subnr for the address reg a0.x */
1132 unsigned subnr:5; /* :1 in align16 */ member in struct:brw_reg
1212 * \param subnr register sub number
1222 unsigned subnr,
1241 reg.subnr = subnr * type_sz(type);
1251 * set swizzle and writemask to W, as the lower bits of subnr will
1266 unsigned subnr)
1270 subnr,
1282 unsigned subnr)
[all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/ |
| brw_eu.h | 569 unsigned dest_subreg_nr:3; /* subnr for the address reg a0.x */
1132 unsigned subnr:5; /* :1 in align16 */ member in struct:brw_reg
1212 * \param subnr register sub number
1222 unsigned subnr,
1241 reg.subnr = subnr * type_sz(type);
1251 * set swizzle and writemask to W, as the lower bits of subnr will
1266 unsigned subnr)
1270 subnr,
1282 unsigned subnr)
[all...] |
