1 /* $NetBSD: sun8i_v3s_gpio.c,v 1.1 2022/06/28 05:19:03 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2021 Rui-Xiang Guo 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: sun8i_v3s_gpio.c,v 1.1 2022/06/28 05:19:03 skrll Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/types.h> 37 38 #include <arm/sunxi/sunxi_gpio.h> 39 40 static const struct sunxi_gpio_pins v3s_pins[] = { 41 {"PB0", 1, 0, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 0}, 42 {"PB1", 1, 1, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 1}, 43 {"PB2", 1, 2, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 2}, 44 {"PB3", 1, 3, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 3}, 45 {"PB4", 1, 4, {"gpio_in", "gpio_out", "pwm0", NULL, NULL, NULL, "irq", NULL}, 6, 4}, 46 {"PB5", 1, 5, {"gpio_in", "gpio_out", "pwm1", NULL, NULL, NULL, "irq", NULL}, 6, 5}, 47 {"PB6", 1, 6, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "irq", NULL}, 6, 6}, 48 {"PB7", 1, 7, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "irq", NULL}, 6, 7}, 49 {"PB8", 1, 8, {"gpio_in", "gpio_out", "i2c1", "uart0", NULL, NULL, "irq", NULL}, 6, 8}, 50 {"PB9", 1, 9, {"gpio_in", "gpio_out", "i2c1", "uart0", NULL, NULL, "irq", NULL}, 6, 9}, 51 52 {"PC0", 2, 0, {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}}, 53 {"PC1", 2, 1, {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}}, 54 {"PC2", 2, 2, {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}}, 55 {"PC3", 2, 3, {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}}, 56 57 {"PE0", 4, 0, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 58 {"PE1", 4, 1, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 59 {"PE2", 4, 2, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 60 {"PE3", 4, 3, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 61 {"PE4", 4, 4, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 62 {"PE5", 4, 5, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 63 {"PE6", 4, 6, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 64 {"PE7", 4, 7, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 65 {"PE8", 4, 8, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 66 {"PE9", 4, 9, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 67 {"PE10", 4, 10, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 68 {"PE11", 4, 11, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 69 {"PE12", 4, 12, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 70 {"PE13", 4, 13, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 71 {"PE14", 4, 14, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 72 {"PE15", 4, 15, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 73 {"PE16", 4, 16, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 74 {"PE17", 4, 17, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 75 {"PE18", 4, 18, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 76 {"PE19", 4, 19, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}}, 77 {"PE20", 4, 20, {"gpio_in", "gpio_out", "csi", "csi_mipi", NULL, NULL, NULL, NULL}}, 78 {"PE21", 4, 21, {"gpio_in", "gpio_out", "csi", "i2c1", "uart1", NULL, NULL, NULL}}, 79 {"PE22", 4, 22, {"gpio_in", "gpio_out", "csi", "i2c1", "uart1", NULL, NULL, NULL}}, 80 {"PE23", 4, 23, {"gpio_in", "gpio_out", "lcd", "uart1", NULL, NULL, NULL, NULL}}, 81 {"PE24", 4, 24, {"gpio_in", "gpio_out", "lcd", "uart1", NULL, NULL, NULL, NULL}}, 82 83 {"PF0", 5, 0, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}}, 84 {"PF1", 5, 1, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}}, 85 {"PF2", 5, 2, {"gpio_in", "gpio_out", "mmc0", "uart0", NULL, NULL, NULL, NULL}}, 86 {"PF3", 5, 3, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}}, 87 {"PF4", 5, 4, {"gpio_in", "gpio_out", "mmc0", "uart0", NULL, NULL, NULL, NULL}}, 88 {"PF5", 5, 5, {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}}, 89 {"PF6", 5, 6, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 90 91 {"PG0", 6, 0, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 0}, 92 {"PG1", 6, 1, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 1}, 93 {"PG2", 6, 2, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 2}, 94 {"PG3", 6, 3, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 3}, 95 {"PG4", 6, 4, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 4}, 96 {"PG5", 6, 5, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 5}, 97 }; 98 99 const struct sunxi_gpio_padconf sun8i_v3s_padconf = { 100 .npins = __arraycount(v3s_pins), 101 .pins = v3s_pins, 102 }; 103
Indexes created Thu Oct 02 14:10:14 GMT 2025