| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/ |
| vmwgfx_ioctl.c | 260 struct vmw_surface *surface; local in function:vmw_present_ioctl
315 surface = vmw_res_to_srf(res);
317 vfb, surface, arg->sid,
322 vmw_surface_unreference(&surface);
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| vmwgfx_kms.h | 53 * surface/buffer object validation, populate FIFO commands and command
72 * Some surface resource or buffer object need some extra cmd submission
73 * like update GB image for proxy surface and define a GMRFB for screen
87 * surface copy/DMA, etc.
99 * This is where to populate clips for surface copy/dma or blit commands
135 * struct vmw_du_update_plane_surface - closure structure for surface
141 /* This member is to handle special case SOU surface update */
237 struct vmw_surface *surface; member in struct:vmw_framebuffer_surface
240 bool is_bo_proxy; /* true if this is proxy surface for DMA buf */
281 * @surf Display surface for STD
[all...] |
| vmwgfx_kms.c | 301 * vmw_du_vps_unpin_surf - unpins resource associated with a framebuffer surface
303 * @vps: plane state associated with the display surface
317 DRM_ERROR("Surface still pinned\n");
330 * Unpins the framebuffer surface
371 vps->surf = vmw_framebuffer_to_vfbs(fb)->surface;
492 struct vmw_surface *surface = NULL; local in function:vmw_du_cursor_plane_atomic_check
518 surface = vmw_framebuffer_to_vfbs(fb)->surface;
520 if (surface && !surface->snooper.image)
1380 struct vmw_surface *surface = NULL; local in function:vmw_kms_fb_create
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc.c | 1498 union surface_update_flags *update_flags = &u->surface->update_flags;
1504 if (u->plane_info->color_space != u->surface->color_space) {
1509 if (u->plane_info->horizontal_mirror != u->surface->horizontal_mirror) {
1514 if (u->plane_info->rotation != u->surface->rotation) {
1519 if (u->plane_info->format != u->surface->format) {
1524 if (u->plane_info->stereo_format != u->surface->stereo_format) {
1529 if (u->plane_info->per_pixel_alpha != u->surface->per_pixel_alpha) {
1534 if (u->plane_info->global_alpha_value != u->surface->global_alpha_value) {
1539 if (u->plane_info->dcc.enable != u->surface->dcc.enable
1540 || u->plane_info->dcc.independent_64b_blks != u->surface->dcc.independent_64b_blk
2389 struct dc_plane_state *surface = srf_updates[i].surface; local in function:dc_commit_updates_for_stream
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dc.h | 173 /* Surface update type is used by dc_update_surfaces_and_stream
180 * ISR safe on windows. Currently fast update will only be used to flip surface
599 * Surface Interfaces
819 struct dc_plane_state *surface; member in struct:dc_surface_update
840 * Create a new surface with default parameters;
861 * This structure holds a surface address. There could be multiple addresses
878 * Structure to store surface/stream associations for validation
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| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/device_include/ |
| svga3d_cmd.h | 349 * A note on surface sizes: Sizes are always specified in pixels,
350 * even if the true surface size is not a multiple of the minimum
351 * block size of the surface's format. For example, a 3x3x1 DXT1
377 * A note on surface sizes: Sizes are always specified in pixels,
378 * even if the true surface size is not a multiple of the minimum
379 * block size of the surface's format. For example, a 3x3x1 DXT1
496 * Perform a surface copy within the same image.
502 SVGA3dSurfaceImageId surface; member in struct:__anon411ade0f1108
533 * If the discard flag is present in a surface DMA operation, the host may
535 * surface before applying the surface DMA contents
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_display.c | 2594 * "The Color Control Surface (CCS) contains the compression status of
2597 * an area on the main surface of 16 x16 sets of 128 byte Y-tiled
2602 * lines on the main surface. Since each pixel is 4 bytes, this gives
2604 * main surface.
2619 * main surface. And each 64B CCS cache line represents an area of 4x1 Y-tiles
2620 * in the main surface. With 4 byte pixels and each Y-tile having dimensions of
2622 * the main surface.
2786 * The main surface pitch must be padded to a multiple of four
2933 * x/y offsets must match between CCS and the main surface.
3822 * AUX surface offset is specified as the distance from th
18623 u32 surface; member in struct:intel_display_error_state::intel_plane_error_state
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon.h | 34 * - surface allocator & initializer : (bit like scratch reg) should
36 * related to surface
1985 } surface; member in struct:radeon_asic
2829 #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s)))
2830 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r)))
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