1 /* $NetBSD: tcds.c,v 1.29 2022/09/25 21:28:51 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Keith Bostic, Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #include <sys/cdefs.h> 61 __KERNEL_RCSID(0, "$NetBSD: tcds.c,v 1.29 2022/09/25 21:28:51 thorpej Exp $"); 62 63 #include <sys/param.h> 64 #include <sys/kernel.h> 65 #include <sys/systm.h> 66 #include <sys/device.h> 67 68 #ifdef __alpha__ 69 #include <machine/rpb.h> 70 #endif /* __alpha__ */ 71 72 #include <dev/scsipi/scsi_all.h> 73 #include <dev/scsipi/scsipi_all.h> 74 #include <dev/scsipi/scsiconf.h> 75 76 #include <dev/ic/ncr53c9xvar.h> 77 78 #include <sys/bus.h> 79 80 #include <dev/tc/tcvar.h> 81 #include <dev/tc/tcdsreg.h> 82 #include <dev/tc/tcdsvar.h> 83 84 #include "locators.h" 85 86 struct tcds_softc { 87 device_t sc_dev; 88 bus_space_tag_t sc_bst; 89 bus_space_handle_t sc_bsh; 90 bus_dma_tag_t sc_dmat; 91 void *sc_cookie; 92 int sc_flags; 93 struct tcds_slotconfig sc_slots[2]; 94 }; 95 96 /* sc_flags */ 97 #define TCDSF_BASEBOARD 0x01 /* baseboard on DEC 3000 */ 98 #define TCDSF_FASTSCSI 0x02 /* supports Fast SCSI */ 99 100 /* Definition of the driver for autoconfig. */ 101 static int tcdsmatch(device_t, cfdata_t, void *); 102 static void tcdsattach(device_t, device_t, void *); 103 static int tcdsprint(void *, const char *); 104 105 CFATTACH_DECL_NEW(tcds, sizeof(struct tcds_softc), 106 tcdsmatch, tcdsattach, NULL, NULL); 107 108 /*static*/ int tcds_intr(void *); 109 /*static*/ int tcds_intrnull(void *); 110 111 static const struct tcds_device { 112 const char *td_name; 113 int td_flags; 114 } tcds_devices[] = { 115 #ifdef __alpha__ 116 { "PMAZ-DS ", TCDSF_BASEBOARD }, 117 { "PMAZ-FS ", TCDSF_BASEBOARD|TCDSF_FASTSCSI }, 118 #endif /* __alpha__ */ 119 { "PMAZB-AA", 0 }, 120 { "PMAZC-AA", TCDSF_FASTSCSI }, 121 { NULL, 0 }, 122 }; 123 124 static void tcds_params(struct tcds_softc *, int, int *, int *); 125 126 static const struct tcds_device * 127 tcds_lookup(const char *modname) 128 { 129 const struct tcds_device *td; 130 131 for (td = tcds_devices; td->td_name != NULL; td++) 132 if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0) 133 return (td); 134 135 return (NULL); 136 } 137 138 static int 139 tcdsmatch(device_t parent, cfdata_t cfdata, void *aux) 140 { 141 struct tc_attach_args *ta = aux; 142 143 return (tcds_lookup(ta->ta_modname) != NULL); 144 } 145 146 static void 147 tcdsattach(device_t parent, device_t self, void *aux) 148 { 149 struct tcds_softc *sc = device_private(self); 150 struct tc_attach_args *ta = aux; 151 struct tcdsdev_attach_args tcdsdev; 152 struct tcds_slotconfig *slotc; 153 const struct tcds_device *td; 154 bus_space_handle_t sbsh[2]; 155 int i, gpi2; 156 const struct evcnt *pevcnt; 157 int locs[TCDSCF_NLOCS]; 158 159 sc->sc_dev = self; 160 161 td = tcds_lookup(ta->ta_modname); 162 if (td == NULL) 163 panic("\ntcdsattach: impossible"); 164 165 printf(": TURBOchannel Dual SCSI"); 166 if (td->td_flags & TCDSF_BASEBOARD) 167 printf(" (baseboard)"); 168 printf("\n"); 169 170 sc->sc_flags = td->td_flags; 171 172 sc->sc_bst = ta->ta_memt; 173 sc->sc_dmat = ta->ta_dmat; 174 175 /* 176 * Map the device. 177 */ 178 if (bus_space_map(sc->sc_bst, ta->ta_addr, 179 (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) { 180 aprint_error_dev(self, "unable to map device\n"); 181 return; 182 } 183 184 /* 185 * Now, slice off two subregions for the individual NCR SCSI chips. 186 */ 187 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET, 188 0x100, &sbsh[0]) || 189 bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET, 190 0x100, &sbsh[1])) { 191 aprint_error_dev(self, "unable to subregion SCSI chip space\n"); 192 return; 193 } 194 195 sc->sc_cookie = ta->ta_cookie; 196 197 pevcnt = tc_intr_evcnt(parent, sc->sc_cookie); 198 tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc); 199 200 /* 201 * XXX 202 * IMER apparently has some random (or, not so random, but still 203 * not useful) bits set in it when the system boots. Clear it. 204 */ 205 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0); 206 207 /* XXX Initial contents of CIR? */ 208 209 /* 210 * Remember if GPI2 is set in the CIR; we'll need it later. 211 */ 212 gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) & 213 TCDS_CIR_GPI_2) != 0; 214 215 /* 216 * Set up the per-slot definitions for later use. 217 */ 218 219 /* fill in common information first */ 220 for (i = 0; i < 2; i++) { 221 char *cp; 222 223 slotc = &sc->sc_slots[i]; 224 memset(slotc, 0, sizeof *slotc); /* clear everything */ 225 226 cp = slotc->sc_name; 227 snprintf(cp, sizeof(slotc->sc_name), "chip %d", i); 228 evcnt_attach_dynamic(&slotc->sc_evcnt, EVCNT_TYPE_INTR, 229 pevcnt, device_xname(self), cp); 230 231 slotc->sc_slot = i; 232 slotc->sc_bst = sc->sc_bst; 233 slotc->sc_bsh = sc->sc_bsh; 234 slotc->sc_intrhand = tcds_intrnull; 235 slotc->sc_intrarg = (void *)(long)i; 236 } 237 238 /* information for slot 0 */ 239 slotc = &sc->sc_slots[0]; 240 slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET; 241 slotc->sc_intrmaskbits = 242 TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB; 243 slotc->sc_intrbits = TCDS_CIR_SCSI0_INT; 244 slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA; 245 slotc->sc_errorbits = 0; /* XXX */ 246 slotc->sc_sda = TCDS_SCSI0_DMA_ADDR; 247 slotc->sc_dic = TCDS_SCSI0_DMA_INTR; 248 slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0; 249 slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1; 250 251 /* information for slot 1 */ 252 slotc = &sc->sc_slots[1]; 253 slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET; 254 slotc->sc_intrmaskbits = 255 TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB; 256 slotc->sc_intrbits = TCDS_CIR_SCSI1_INT; 257 slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA; 258 slotc->sc_errorbits = 0; /* XXX */ 259 slotc->sc_sda = TCDS_SCSI1_DMA_ADDR; 260 slotc->sc_dic = TCDS_SCSI1_DMA_INTR; 261 slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0; 262 slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1; 263 264 /* find the hardware attached to the TCDS ASIC */ 265 for (i = 0; i < 2; i++) { 266 tcds_params(sc, i, &tcdsdev.tcdsda_id, 267 &tcdsdev.tcdsda_fast); 268 269 tcdsdev.tcdsda_bst = sc->sc_bst; 270 tcdsdev.tcdsda_bsh = sbsh[i]; 271 tcdsdev.tcdsda_dmat = sc->sc_dmat; 272 tcdsdev.tcdsda_chip = i; 273 tcdsdev.tcdsda_sc = &sc->sc_slots[i]; 274 /* 275 * Determine the chip frequency. TCDSF_FASTSCSI will be set 276 * for TC option cards. For baseboard chips, GPI2 is set, for a 277 * 25MHz clock, else a 40MHz clock. 278 */ 279 if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) || 280 sc->sc_flags & TCDSF_FASTSCSI) { 281 tcdsdev.tcdsda_freq = 40000000; 282 tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8; 283 } else { 284 tcdsdev.tcdsda_freq = 25000000; 285 tcdsdev.tcdsda_period = 5; 286 } 287 if (sc->sc_flags & TCDSF_BASEBOARD) 288 tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94; 289 else 290 tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96; 291 292 tcds_scsi_reset(tcdsdev.tcdsda_sc); 293 294 locs[TCDSCF_CHIP] = i; 295 296 config_found(self, &tcdsdev, tcdsprint, 297 CFARGS(.submatch = config_stdsubmatch, 298 .locators = locs)); 299 #ifdef __alpha__ 300 /* 301 * The second SCSI chip isn't present on the baseboard TCDS 302 * on the DEC Alpha 3000/300 series. 303 */ 304 if (sc->sc_flags & TCDSF_BASEBOARD && 305 cputype == ST_DEC_3000_300) 306 break; 307 #endif /* __alpha__ */ 308 } 309 } 310 311 static int 312 tcdsprint(void *aux, const char *pnp) 313 { 314 struct tcdsdev_attach_args *tcdsdev = aux; 315 316 /* Only ASCs can attach to TCDSs; easy. */ 317 if (pnp) 318 aprint_normal("asc at %s", pnp); 319 320 aprint_normal(" chip %d", tcdsdev->tcdsda_chip); 321 322 return (UNCONF); 323 } 324 325 void 326 tcds_intr_establish(device_t tcds, int slot, int (*func)(void *), 327 void *arg) 328 { 329 struct tcds_softc *sc = device_private(tcds); 330 331 if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull) 332 panic("tcds_intr_establish: chip %d twice", slot); 333 334 sc->sc_slots[slot].sc_intrhand = func; 335 sc->sc_slots[slot].sc_intrarg = arg; 336 tcds_scsi_reset(&sc->sc_slots[slot]); 337 } 338 339 void 340 tcds_intr_disestablish(device_t tcds, int slot) 341 { 342 struct tcds_softc *sc = device_private(tcds); 343 344 if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull) 345 panic("tcds_intr_disestablish: chip %d missing intr", 346 slot); 347 348 sc->sc_slots[slot].sc_intrhand = tcds_intrnull; 349 sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot; 350 351 tcds_dma_enable(&sc->sc_slots[slot], 0); 352 tcds_scsi_enable(&sc->sc_slots[slot], 0); 353 } 354 355 int 356 tcds_intrnull(void *val) 357 { 358 359 panic("tcds_intrnull: uncaught TCDS intr for chip %lu", 360 (u_long)val); 361 } 362 363 void 364 tcds_scsi_reset(struct tcds_slotconfig *sc) 365 { 366 uint32_t cir; 367 368 tcds_dma_enable(sc, 0); 369 tcds_scsi_enable(sc, 0); 370 371 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 372 TCDS_CIR_CLR(cir, sc->sc_resetbits); 373 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 374 375 DELAY(1); 376 377 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 378 TCDS_CIR_SET(cir, sc->sc_resetbits); 379 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 380 381 tcds_scsi_enable(sc, 1); 382 tcds_dma_enable(sc, 1); 383 } 384 385 void 386 tcds_scsi_enable(struct tcds_slotconfig *sc, int on) 387 { 388 uint32_t imer; 389 390 imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER); 391 392 if (on) 393 imer |= sc->sc_intrmaskbits; 394 else 395 imer &= ~sc->sc_intrmaskbits; 396 397 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer); 398 } 399 400 void 401 tcds_dma_enable(struct tcds_slotconfig *sc, int on) 402 { 403 uint32_t cir; 404 405 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 406 407 /* XXX Clear/set IOSLOT/PBS bits. */ 408 if (on) 409 TCDS_CIR_SET(cir, sc->sc_dmabits); 410 else 411 TCDS_CIR_CLR(cir, sc->sc_dmabits); 412 413 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 414 } 415 416 int 417 tcds_scsi_isintr(struct tcds_slotconfig *sc, int clear) 418 { 419 uint32_t cir; 420 421 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 422 423 if ((cir & sc->sc_intrbits) != 0) { 424 if (clear) { 425 TCDS_CIR_CLR(cir, sc->sc_intrbits); 426 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, 427 cir); 428 } 429 return (1); 430 } else 431 return (0); 432 } 433 434 int 435 tcds_scsi_iserr(struct tcds_slotconfig *sc) 436 { 437 uint32_t cir; 438 439 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 440 return ((cir & sc->sc_errorbits) != 0); 441 } 442 443 int 444 tcds_intr(void *arg) 445 { 446 struct tcds_softc *sc = arg; 447 uint32_t ir, ir0; 448 449 /* 450 * XXX 451 * Copy and clear (gag!) the interrupts. 452 */ 453 ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 454 TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR); 455 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0); 456 tc_syncbus(); 457 458 #define INCRINTRCNT(slot) sc->sc_slots[slot].sc_evcnt.ev_count++ 459 460 #define CHECKINTR(slot) \ 461 if (ir & sc->sc_slots[slot].sc_intrbits) { \ 462 INCRINTRCNT(slot); \ 463 (void)(*sc->sc_slots[slot].sc_intrhand) \ 464 (sc->sc_slots[slot].sc_intrarg); \ 465 } 466 CHECKINTR(0); 467 CHECKINTR(1); 468 #undef CHECKINTR 469 470 #ifdef DIAGNOSTIC 471 /* 472 * Interrupts not currently handled, but would like to know if they 473 * occur. 474 * 475 * XXX 476 * Don't know if we have to set the interrupt mask and enable bits 477 * in the IMER to allow some of them to happen? 478 */ 479 #define PRINTINTR(msg, bits) \ 480 if (ir & bits) \ 481 printf("%s: %s", device_xname(sc->sc_dev), msg); 482 PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ); 483 PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ); 484 PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH); 485 PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH); 486 PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA); 487 PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA); 488 PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB); 489 PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB); 490 PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR); 491 PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR); 492 PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR); 493 PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR); 494 PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR); 495 PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR); 496 #undef PRINTINTR 497 #endif 498 499 /* 500 * XXX 501 * The MACH source had this, with the comment: 502 * This is wrong, but machine keeps dying. 503 */ 504 DELAY(1); 505 506 return (1); 507 } 508 509 static void 510 tcds_params(struct tcds_softc *sc, int chip, int *idp, int *fastp) 511 { 512 int id, fast; 513 uint32_t ids; 514 515 #ifdef __alpha__ 516 if (sc->sc_flags & TCDSF_BASEBOARD) { 517 extern uint8_t dec_3000_scsiid[], dec_3000_scsifast[]; 518 519 id = dec_3000_scsiid[chip]; 520 fast = dec_3000_scsifast[chip]; 521 } else 522 #endif /* __alpha__ */ 523 { 524 /* 525 * SCSI IDs are stored in the EEPROM, along with whether or 526 * not the device is "fast". Chip 0 is the high nibble, 527 * chip 1 the low nibble. 528 */ 529 ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS); 530 if (chip == 0) 531 ids >>= 4; 532 533 id = ids & 0x7; 534 fast = ids & 0x8; 535 } 536 537 if (id < 0 || id > 7) { 538 printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n", 539 device_xname(sc->sc_dev), id, chip); 540 id = 7; 541 } 542 543 if (fast) 544 printf("%s: fast mode set for chip %d\n", 545 device_xname(sc->sc_dev), chip); 546 547 *idp = id; 548 *fastp = fast; 549 } 550
Indexes created Tue Sep 23 07:09:52 GMT 2025