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    Searched defs:tiling (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_gem_fence_reg.c 50 * have their own tiling state bits and don't need fences.
52 * Also note that fences only support X and Y tiling and hence can't be used for
53 * the fancier new tiling formats like W, Ys and Yf.
142 unsigned int tiling = i915_gem_object_get_tiling(vma->obj); local in function:i915_write_fence_reg
143 bool is_y_tiled = tiling == I915_TILING_Y;
248 "bogus fence setup with stride: 0x%x, tiling mode: %i\n",
409 * and tiling format.
515 * Commit delayed tiling changes if we have an object still
527 * DOC: tiling swizzling details
529 * The idea behind tiling is to increase cache hit rates by rearrangin
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  /src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/
i915_gem_mman.c 29 unsigned int tiling; member in struct:tile
42 if (tile->tiling == I915_TILING_NONE)
48 if (tile->tiling == I915_TILING_X) {
101 err = i915_gem_object_set_tiling(obj, tile->tiling, tile->stride);
103 pr_err("Failed to set tiling mode=%u, stride=%u, err=%d\n",
104 tile->tiling, tile->stride, err);
108 GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling);
154 pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%llu + %u [0x%llx]) of 0x%x, found 0x%x\n",
159 tile->tiling ? tile_row_pages(obj) : 0,
160 vma->fence ? vma->fence->id : -1, tile->tiling, tile->stride
309 int tiling; local in function:igt_partial_tiling
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  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_display_types.h 617 unsigned int tiling; member in struct:intel_initial_plane_config
intel_display.c 3432 switch (plane_config->tiling) {
3437 obj->tiling_and_stride = fb->pitches[0] | plane_config->tiling;
3440 MISSING_CASE(plane_config->tiling);
3641 if (plane_config->tiling)
3841 DRM_DEBUG_KMS("Unable to find suitable display surface offset due to X-tiling\n");
9117 plane_config->tiling = I915_TILING_X;
9137 if (plane_config->tiling)
10289 u32 val, base, offset __unused, stride_mult, tiling, alpha; local in function:skl_get_initial_plane_config
10328 tiling = val & PLANE_CTL_TILED_MASK;
10329 switch (tiling) {
16937 unsigned int tiling, stride; local in function:intel_framebuffer_init
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