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      1 /*	$NetBSD: ramcfg.h,v 1.3 2021/12/18 23:45:33 riastradh Exp $	*/
      2 
      3 /* SPDX-License-Identifier: MIT */
      4 #ifndef __NVBIOS_RAMCFG_H__
      5 #define __NVBIOS_RAMCFG_H__
      6 struct nvbios_ramcfg {
      7 	unsigned rammap_ver;
      8 	unsigned rammap_hdr;
      9 	unsigned rammap_min;
     10 	unsigned rammap_max;
     11 	union {
     12 		struct {
     13 			unsigned rammap_00_16_20:1;
     14 			unsigned rammap_00_16_40:1;
     15 			unsigned rammap_00_17_02:1;
     16 		};
     17 		struct {
     18 			unsigned rammap_10_04_02:1;
     19 			unsigned rammap_10_04_08:1;
     20 		};
     21 		struct {
     22 			unsigned rammap_11_08_01:1;
     23 			unsigned rammap_11_08_0c:2;
     24 			unsigned rammap_11_08_10:1;
     25 			unsigned rammap_11_09_01ff:9;
     26 			unsigned rammap_11_0a_03fe:9;
     27 			unsigned rammap_11_0a_0400:1;
     28 			unsigned rammap_11_0a_0800:1;
     29 			unsigned rammap_11_0b_01f0:5;
     30 			unsigned rammap_11_0b_0200:1;
     31 			unsigned rammap_11_0b_0400:1;
     32 			unsigned rammap_11_0b_0800:1;
     33 			unsigned rammap_11_0d:8;
     34 			unsigned rammap_11_0e:8;
     35 			unsigned rammap_11_0f:8;
     36 			unsigned rammap_11_11_0c:2;
     37 		};
     38 	};
     39 
     40 	unsigned ramcfg_ver;
     41 	unsigned ramcfg_hdr;
     42 	unsigned ramcfg_timing;
     43 	unsigned ramcfg_DLLoff;
     44 	unsigned ramcfg_RON;
     45 	unsigned ramcfg_FBVDDQ;
     46 	union {
     47 		struct {
     48 			unsigned ramcfg_00_03_01:1;
     49 			unsigned ramcfg_00_03_02:1;
     50 			unsigned ramcfg_00_03_08:1;
     51 			unsigned ramcfg_00_03_10:1;
     52 			unsigned ramcfg_00_04_02:1;
     53 			unsigned ramcfg_00_04_04:1;
     54 			unsigned ramcfg_00_04_20:1;
     55 			unsigned ramcfg_00_05:8;
     56 			unsigned ramcfg_00_06:8;
     57 			unsigned ramcfg_00_07:8;
     58 			unsigned ramcfg_00_08:8;
     59 			unsigned ramcfg_00_09:8;
     60 			unsigned ramcfg_00_0a_0f:4;
     61 			unsigned ramcfg_00_0a_f0:4;
     62 		};
     63 		struct {
     64 			unsigned ramcfg_10_02_01:1;
     65 			unsigned ramcfg_10_02_02:1;
     66 			unsigned ramcfg_10_02_04:1;
     67 			unsigned ramcfg_10_02_08:1;
     68 			unsigned ramcfg_10_02_10:1;
     69 			unsigned ramcfg_10_02_20:1;
     70 			unsigned ramcfg_10_03_0f:4;
     71 			unsigned ramcfg_10_04_01:1;
     72 			unsigned ramcfg_10_05:8;
     73 			unsigned ramcfg_10_06:8;
     74 			unsigned ramcfg_10_07:8;
     75 			unsigned ramcfg_10_08:8;
     76 			unsigned ramcfg_10_09_0f:4;
     77 			unsigned ramcfg_10_09_f0:4;
     78 		};
     79 		struct {
     80 			unsigned ramcfg_11_01_01:1;
     81 			unsigned ramcfg_11_01_02:1;
     82 			unsigned ramcfg_11_01_04:1;
     83 			unsigned ramcfg_11_01_08:1;
     84 			unsigned ramcfg_11_01_10:1;
     85 			unsigned ramcfg_11_01_40:1;
     86 			unsigned ramcfg_11_01_80:1;
     87 			unsigned ramcfg_11_02_03:2;
     88 			unsigned ramcfg_11_02_04:1;
     89 			unsigned ramcfg_11_02_08:1;
     90 			unsigned ramcfg_11_02_10:1;
     91 			unsigned ramcfg_11_02_40:1;
     92 			unsigned ramcfg_11_02_80:1;
     93 			unsigned ramcfg_11_03_0f:4;
     94 			unsigned ramcfg_11_03_30:2;
     95 			unsigned ramcfg_11_03_c0:2;
     96 			unsigned ramcfg_11_03_f0:4;
     97 			unsigned ramcfg_11_04:8;
     98 			unsigned ramcfg_11_06:8;
     99 			unsigned ramcfg_11_07_02:1;
    100 			unsigned ramcfg_11_07_04:1;
    101 			unsigned ramcfg_11_07_08:1;
    102 			unsigned ramcfg_11_07_10:1;
    103 			unsigned ramcfg_11_07_40:1;
    104 			unsigned ramcfg_11_07_80:1;
    105 			unsigned ramcfg_11_08_01:1;
    106 			unsigned ramcfg_11_08_02:1;
    107 			unsigned ramcfg_11_08_04:1;
    108 			unsigned ramcfg_11_08_08:1;
    109 			unsigned ramcfg_11_08_10:1;
    110 			unsigned ramcfg_11_08_20:1;
    111 			unsigned ramcfg_11_09:8;
    112 		};
    113 	};
    114 
    115 	unsigned timing_ver;
    116 	unsigned timing_hdr;
    117 	unsigned timing[11];
    118 	union {
    119 		struct {
    120 			unsigned timing_10_WR:8;
    121 			unsigned timing_10_WTR:8;
    122 			unsigned timing_10_CL:8;
    123 			unsigned timing_10_RC:8;
    124 			/*empty: 4 */
    125 			unsigned timing_10_RFC:8;        /* Byte 5 */
    126 			/*empty: 6 */
    127 			unsigned timing_10_RAS:8;        /* Byte 7 */
    128 			/*empty: 8 */
    129 			unsigned timing_10_RP:8;         /* Byte 9 */
    130 			unsigned timing_10_RCDRD:8;
    131 			unsigned timing_10_RCDWR:8;
    132 			unsigned timing_10_RRD:8;
    133 			unsigned timing_10_13:8;
    134 			unsigned timing_10_ODT:3;
    135 			/* empty: 15 */
    136 			unsigned timing_10_16:8;
    137 			/* empty: 17 */
    138 			unsigned timing_10_18:8;
    139 			unsigned timing_10_CWL:8;
    140 			unsigned timing_10_20:8;
    141 			unsigned timing_10_21:8;
    142 			/* empty: 22, 23 */
    143 			unsigned timing_10_24:8;
    144 		};
    145 		struct {
    146 			unsigned timing_20_2e_03:2;
    147 			unsigned timing_20_2e_30:2;
    148 			unsigned timing_20_2e_c0:2;
    149 			unsigned timing_20_2f_03:2;
    150 			unsigned timing_20_2c_003f:6;
    151 			unsigned timing_20_2c_1fc0:7;
    152 			unsigned timing_20_30_f8:5;
    153 			unsigned timing_20_30_07:3;
    154 			unsigned timing_20_31_0007:3;
    155 			unsigned timing_20_31_0078:4;
    156 			unsigned timing_20_31_0780:4;
    157 			unsigned timing_20_31_0800:1;
    158 			unsigned timing_20_31_7000:3;
    159 			unsigned timing_20_31_8000:1;
    160 		};
    161 	};
    162 };
    163 
    164 u8 nvbios_ramcfg_count(struct nvkm_bios *);
    165 u8 nvbios_ramcfg_index(struct nvkm_subdev *);
    166 #endif
    167