1 /* $NetBSD: nouveau_nvkm_subdev_fault_tu102.c,v 1.2 2021/12/18 23:45:39 riastradh Exp $ */ 2 3 /* 4 * Copyright 2018 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 */ 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_fault_tu102.c,v 1.2 2021/12/18 23:45:39 riastradh Exp $"); 26 27 #include "priv.h" 28 29 #include <core/memory.h> 30 #include <subdev/mmu.h> 31 #include <engine/fifo.h> 32 33 #include <nvif/class.h> 34 35 static void 36 tu102_fault_buffer_intr(struct nvkm_fault_buffer *buffer, bool enable) 37 { 38 /*XXX: Earlier versions of RM touched the old regs on Turing, 39 * which don't appear to actually work anymore, but newer 40 * versions of RM don't appear to touch anything at all.. 41 */ 42 } 43 44 static void 45 tu102_fault_buffer_fini(struct nvkm_fault_buffer *buffer) 46 { 47 struct nvkm_device *device = buffer->fault->subdev.device; 48 const u32 foff = buffer->id * 0x20; 49 nvkm_mask(device, 0xb83010 + foff, 0x80000000, 0x00000000); 50 } 51 52 static void 53 tu102_fault_buffer_init(struct nvkm_fault_buffer *buffer) 54 { 55 struct nvkm_device *device = buffer->fault->subdev.device; 56 const u32 foff = buffer->id * 0x20; 57 58 nvkm_mask(device, 0xb83010 + foff, 0xc0000000, 0x40000000); 59 nvkm_wr32(device, 0xb83004 + foff, upper_32_bits(buffer->addr)); 60 nvkm_wr32(device, 0xb83000 + foff, lower_32_bits(buffer->addr)); 61 nvkm_mask(device, 0xb83010 + foff, 0x80000000, 0x80000000); 62 } 63 64 static void 65 tu102_fault_buffer_info(struct nvkm_fault_buffer *buffer) 66 { 67 struct nvkm_device *device = buffer->fault->subdev.device; 68 const u32 foff = buffer->id * 0x20; 69 70 nvkm_mask(device, 0xb83010 + foff, 0x40000000, 0x40000000); 71 72 buffer->entries = nvkm_rd32(device, 0xb83010 + foff) & 0x000fffff; 73 buffer->get = 0xb83008 + foff; 74 buffer->put = 0xb8300c + foff; 75 } 76 77 static void 78 tu102_fault_intr_fault(struct nvkm_fault *fault) 79 { 80 struct nvkm_subdev *subdev = &fault->subdev; 81 struct nvkm_device *device = subdev->device; 82 struct nvkm_fault_data info; 83 const u32 addrlo = nvkm_rd32(device, 0xb83080); 84 const u32 addrhi = nvkm_rd32(device, 0xb83084); 85 const u32 info0 = nvkm_rd32(device, 0xb83088); 86 const u32 insthi = nvkm_rd32(device, 0xb8308c); 87 const u32 info1 = nvkm_rd32(device, 0xb83090); 88 89 info.addr = ((u64)addrhi << 32) | addrlo; 90 info.inst = ((u64)insthi << 32) | (info0 & 0xfffff000); 91 info.time = 0; 92 info.engine = (info0 & 0x000000ff); 93 info.valid = (info1 & 0x80000000) >> 31; 94 info.gpc = (info1 & 0x1f000000) >> 24; 95 info.hub = (info1 & 0x00100000) >> 20; 96 info.access = (info1 & 0x000f0000) >> 16; 97 info.client = (info1 & 0x00007f00) >> 8; 98 info.reason = (info1 & 0x0000001f); 99 100 nvkm_fifo_fault(device->fifo, &info); 101 } 102 103 static void 104 tu102_fault_intr(struct nvkm_fault *fault) 105 { 106 struct nvkm_subdev *subdev = &fault->subdev; 107 struct nvkm_device *device = subdev->device; 108 u32 stat = nvkm_rd32(device, 0xb83094); 109 110 if (stat & 0x80000000) { 111 tu102_fault_intr_fault(fault); 112 nvkm_wr32(device, 0xb83094, 0x80000000); 113 stat &= ~0x80000000; 114 } 115 116 if (stat & 0x00000200) { 117 if (fault->buffer[0]) { 118 nvkm_event_send(&fault->event, 1, 0, NULL, 0); 119 stat &= ~0x00000200; 120 } 121 } 122 123 /*XXX: guess, can't confirm until we get fw... */ 124 if (stat & 0x00000100) { 125 if (fault->buffer[1]) { 126 nvkm_event_send(&fault->event, 1, 1, NULL, 0); 127 stat &= ~0x00000100; 128 } 129 } 130 131 if (stat) { 132 nvkm_debug(subdev, "intr %08x\n", stat); 133 } 134 } 135 136 static void 137 tu102_fault_fini(struct nvkm_fault *fault) 138 { 139 nvkm_notify_put(&fault->nrpfb); 140 if (fault->buffer[0]) 141 fault->func->buffer.fini(fault->buffer[0]); 142 /*XXX: disable priv faults */ 143 } 144 145 static void 146 tu102_fault_init(struct nvkm_fault *fault) 147 { 148 /*XXX: enable priv faults */ 149 fault->func->buffer.init(fault->buffer[0]); 150 nvkm_notify_get(&fault->nrpfb); 151 } 152 153 static const struct nvkm_fault_func 154 tu102_fault = { 155 .oneinit = gv100_fault_oneinit, 156 .init = tu102_fault_init, 157 .fini = tu102_fault_fini, 158 .intr = tu102_fault_intr, 159 .buffer.nr = 2, 160 .buffer.entry_size = 32, 161 .buffer.info = tu102_fault_buffer_info, 162 .buffer.pin = gp100_fault_buffer_pin, 163 .buffer.init = tu102_fault_buffer_init, 164 .buffer.fini = tu102_fault_buffer_fini, 165 .buffer.intr = tu102_fault_buffer_intr, 166 .user = { { 0, 0, VOLTA_FAULT_BUFFER_A }, 1 }, 167 }; 168 169 int 170 tu102_fault_new(struct nvkm_device *device, int index, 171 struct nvkm_fault **pfault) 172 { 173 return nvkm_fault_new_(&tu102_fault, device, index, pfault); 174 } 175
Indexes created Sat Sep 20 22:09:52 GMT 2025