Home | History | Annotate | Line # | Download | only in disp 
      1 /*	$NetBSD: nouveau_nvkm_engine_disp_sortu102.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2018 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  */
     24 #include <sys/cdefs.h>
     25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_sortu102.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $");
     26 
     27 #include "ior.h"
     28 
     29 #include <subdev/timer.h>
     30 
     31 static void
     32 tu102_sor_dp_vcpi(struct nvkm_ior *sor, int head,
     33 		  u8 slot, u8 slot_nr, u16 pbn, u16 aligned)
     34 {
     35 	struct nvkm_device *device = sor->disp->engine.subdev.device;
     36 	const u32 hoff = head * 0x800;
     37 
     38 	nvkm_mask(device, 0x61657c + hoff, 0xffffffff, (aligned << 16) | pbn);
     39 	nvkm_mask(device, 0x616578 + hoff, 0x00003f3f, (slot_nr << 8) | slot);
     40 }
     41 
     42 static int
     43 tu102_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
     44 {
     45 	struct nvkm_device *device = sor->disp->engine.subdev.device;
     46 	const u32 soff = nv50_ior_base(sor);
     47 	const u32 loff = nv50_sor_link(sor);
     48 	u32 dpctrl = 0x00000000;
     49 	u32 clksor = 0x00000000;
     50 
     51 	clksor |= sor->dp.bw << 18;
     52 	dpctrl |= ((1 << sor->dp.nr) - 1) << 16;
     53 	if (sor->dp.mst)
     54 		dpctrl |= 0x40000000;
     55 	if (sor->dp.ef)
     56 		dpctrl |= 0x00004000;
     57 
     58 	nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor);
     59 
     60 	/*XXX*/
     61 	nvkm_msec(device, 40, NVKM_DELAY);
     62 	nvkm_mask(device, 0x612300 + soff, 0x00030000, 0x00010000);
     63 	nvkm_mask(device, 0x61c10c + loff, 0x00000003, 0x00000001);
     64 
     65 	nvkm_mask(device, 0x61c10c + loff, 0x401f4000, dpctrl);
     66 	return 0;
     67 }
     68 
     69 static const struct nvkm_ior_func
     70 tu102_sor = {
     71 	.route = {
     72 		.get = gm200_sor_route_get,
     73 		.set = gm200_sor_route_set,
     74 	},
     75 	.state = gv100_sor_state,
     76 	.power = nv50_sor_power,
     77 	.clock = gf119_sor_clock,
     78 	.hdmi = {
     79 		.ctrl = gv100_hdmi_ctrl,
     80 		.scdc = gm200_hdmi_scdc,
     81 	},
     82 	.dp = {
     83 		.lanes = { 0, 1, 2, 3 },
     84 		.links = tu102_sor_dp_links,
     85 		.power = g94_sor_dp_power,
     86 		.pattern = gm107_sor_dp_pattern,
     87 		.drive = gm200_sor_dp_drive,
     88 		.vcpi = tu102_sor_dp_vcpi,
     89 		.audio = gv100_sor_dp_audio,
     90 		.audio_sym = gv100_sor_dp_audio_sym,
     91 		.watermark = gv100_sor_dp_watermark,
     92 	},
     93 	.hda = {
     94 		.hpd = gf119_hda_hpd,
     95 		.eld = gf119_hda_eld,
     96 	},
     97 };
     98 
     99 int
    100 tu102_sor_new(struct nvkm_disp *disp, int id)
    101 {
    102 	return nvkm_ior_new_(&tu102_sor, disp, SOR, id);
    103 }
    104