1 /* $NetBSD: universe_pci.c,v 1.13 2018/12/09 11:14:02 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Common functions for PCI-VME-interfaces using the 31 * Newbridge/Tundra Universe II chip (CA91C142). 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: universe_pci.c,v 1.13 2018/12/09 11:14:02 jdolecek Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 /*#include <dev/pci/pcidevs.h>*/ 44 45 #include <sys/bus.h> 46 47 #include <dev/vme/vmereg.h> 48 #include <dev/vme/vmevar.h> 49 50 #include <dev/ic/universereg.h> 51 #include <dev/pci/universe_pci_var.h> 52 53 int univ_pci_intr(void *); 54 55 #define read_csr_4(d, reg) \ 56 bus_space_read_4(d->csrt, d->csrh, offsetof(struct universereg, reg)) 57 #define write_csr_4(d, reg, val) \ 58 bus_space_write_4(d->csrt, d->csrh, offsetof(struct universereg, reg), val) 59 60 #define _pso(i) offsetof(struct universereg, __CONCAT(pcislv, i)) 61 static int pcislvoffsets[8] = { 62 _pso(0), _pso(1), _pso(2), _pso(3), 63 _pso(4), _pso(5), _pso(6), _pso(7) 64 }; 65 #undef _pso 66 67 #define read_pcislv(d, idx, reg) \ 68 bus_space_read_4(d->csrt, d->csrh, \ 69 pcislvoffsets[idx] + offsetof(struct universe_pcislvimg, reg)) 70 #define write_pcislv(d, idx, reg, val) \ 71 bus_space_write_4(d->csrt, d->csrh, \ 72 pcislvoffsets[idx] + offsetof(struct universe_pcislvimg, reg), val) 73 74 75 #define _vso(i) offsetof(struct universereg, __CONCAT(vmeslv, i)) 76 static int vmeslvoffsets[8] = { 77 _vso(0), _vso(1), _vso(2), _vso(3), 78 _vso(4), _vso(5), _vso(6), _vso(7) 79 }; 80 #undef _vso 81 82 #define read_vmeslv(d, idx, reg) \ 83 bus_space_read_4(d->csrt, d->csrh, \ 84 vmeslvoffsets[idx] + offsetof(struct universe_vmeslvimg, reg)) 85 #define write_vmeslv(d, idx, reg, val) \ 86 bus_space_write_4(d->csrt, d->csrh, \ 87 vmeslvoffsets[idx] + offsetof(struct universe_vmeslvimg, reg), val) 88 89 int 90 univ_pci_attach(struct univ_pci_data *d, struct pci_attach_args *pa, const char *name, void (*inthdl)(void *, int, int), void *intcookie) 91 { 92 pci_chipset_tag_t pc = pa->pa_pc; 93 pci_intr_handle_t ih; 94 const char *intrstr = NULL; 95 u_int32_t reg; 96 int i; 97 char intrbuf[PCI_INTRSTR_LEN]; 98 99 d->pc = pc; 100 strncpy(d->devname, name, sizeof(d->devname)); 101 d->devname[sizeof(d->devname) - 1] = '\0'; 102 103 if (pci_mapreg_map(pa, 0x10, 104 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 105 0, &d->csrt, &d->csrh, NULL, NULL) && 106 pci_mapreg_map(pa, 0x14, 107 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 108 0, &d->csrt, &d->csrh, NULL, NULL) && 109 pci_mapreg_map(pa, 0x10, 110 PCI_MAPREG_TYPE_IO, 111 0, &d->csrt, &d->csrh, NULL, NULL) && 112 pci_mapreg_map(pa, 0x14, 113 PCI_MAPREG_TYPE_IO, 114 0, &d->csrt, &d->csrh, NULL, NULL)) 115 return (-1); 116 117 /* name sure the chip is in a sane state */ 118 write_csr_4(d, lint_en, 0); /* mask all PCI interrupts */ 119 write_csr_4(d, vint_en, 0); /* mask all VME interrupts */ 120 write_csr_4(d, dgcs, 0x40000000); /* stop DMA activity */ 121 for (i = 0; i < 8; i++) { 122 univ_pci_unmapvme(d, i); 123 univ_pci_unmappci(d, i); 124 } 125 write_csr_4(d, slsi, 0); /* disable "special PCI slave image" */ 126 127 /* enable DMA */ 128 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 129 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 130 PCI_COMMAND_MASTER_ENABLE); 131 132 reg = read_csr_4(d, misc_ctl); 133 aprint_normal("%s: ", name); 134 if (reg & 0x00020000) /* SYSCON */ 135 aprint_normal("VME bus controller, "); 136 reg = read_csr_4(d, mast_ctl); 137 aprint_normal("requesting at VME bus level %d\n", (reg >> 22) & 3); 138 139 /* Map and establish the PCI interrupt. */ 140 if (pci_intr_map(pa, &ih)) { 141 aprint_error("%s: couldn't map interrupt\n", name); 142 return (-1); 143 } 144 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 145 /* 146 * Use a low interrupt level (the lowest?). 147 * We will raise before calling a subdevice's handler. 148 */ 149 d->ih = pci_intr_establish_xname(pc, ih, IPL_BIO, univ_pci_intr, d, 150 name); 151 if (d->ih == NULL) { 152 aprint_error("%s: couldn't establish interrupt", name); 153 if (intrstr != NULL) 154 aprint_error(" at %s", intrstr); 155 aprint_error("\n"); 156 return (-1); 157 } 158 aprint_normal("%s: interrupting at %s\n", name, intrstr); 159 160 /* handle all VME interrupts (XXX should be configurable) */ 161 d->vmeinthandler = inthdl; 162 d->vmeintcookie = intcookie; 163 write_csr_4(d, lint_stat, 0x00ff37ff); /* ack all pending IRQs */ 164 write_csr_4(d, lint_en, 0x000000fe); /* enable VME IRQ 1..7 */ 165 166 return (0); 167 } 168 169 int 170 univ_pci_mapvme(struct univ_pci_data *d, int wnd, vme_addr_t vmebase, u_int32_t len, vme_am_t am, vme_datasize_t datawidth, u_int32_t pcibase) 171 { 172 u_int32_t ctl = 0x80000000; 173 174 switch (am & VME_AM_ADRSIZEMASK) { 175 case VME_AM_A32: 176 ctl |= 0x00020000; 177 break; 178 case VME_AM_A24: 179 ctl |= 0x00010000; 180 break; 181 case VME_AM_A16: 182 break; 183 default: 184 return (EINVAL); 185 } 186 if (am & VME_AM_SUPER) 187 ctl |= 0x00001000; 188 if ((am & VME_AM_MODEMASK) == VME_AM_PRG) 189 ctl |= 0x00004000; 190 if (datawidth & VME_D32) 191 ctl |= 0x00800000; 192 else if (datawidth & VME_D16) 193 ctl |= 0x00400000; 194 else if (!(datawidth & VME_D8)) 195 return (EINVAL); 196 197 #ifdef UNIV_DEBUG 198 printf("%s: wnd %d, map VME %x-%x to %x, ctl=%x\n", 199 d->devname, wnd, vmebase, vmebase + len, pcibase, ctl); 200 #endif 201 202 write_pcislv(d, wnd, lsi_bs, pcibase); 203 write_pcislv(d, wnd, lsi_bd, pcibase + len); 204 write_pcislv(d, wnd, lsi_to, vmebase - pcibase); 205 write_pcislv(d, wnd, lsi_ctl, ctl); 206 return (0); 207 } 208 209 void 210 univ_pci_unmapvme(struct univ_pci_data *d, int wnd) 211 { 212 #ifdef UNIV_DEBUG 213 printf("%s: unmap VME wnd %d\n", d->devname, wnd); 214 #endif 215 write_pcislv(d, wnd, lsi_ctl, 0); 216 } 217 218 219 int 220 univ_pci_mappci(struct univ_pci_data *d, int wnd, u_int32_t pcibase, u_int32_t len, vme_addr_t vmebase, vme_am_t am) 221 { 222 u_int32_t ctl = 0x80000000; 223 224 switch (am & VME_AM_ADRSIZEMASK) { 225 case VME_AM_A32: 226 ctl |= 0x00020000; 227 break; 228 case VME_AM_A24: 229 ctl |= 0x00010000; 230 break; 231 case VME_AM_A16: 232 break; 233 default: 234 return (EINVAL); 235 } 236 if (am & VME_AM_SUPER) 237 ctl |= 0x00200000; 238 else 239 ctl |= 0x00300000; /* both */ 240 if ((am & VME_AM_MODEMASK) == VME_AM_PRG) 241 ctl |= 0x00800000; 242 else 243 ctl |= 0x00c00000; /* both */ 244 245 #ifdef UNIV_DEBUG 246 printf("%s: wnd %d, map PCI %x-%x to %x, ctl=%x\n", 247 d->devname, wnd, pcibase, pcibase + len, vmebase, ctl); 248 #endif 249 250 write_vmeslv(d, wnd, vsi_bs, vmebase); 251 write_vmeslv(d, wnd, vsi_bd, vmebase + len); 252 write_vmeslv(d, wnd, vsi_to, pcibase - vmebase); 253 write_vmeslv(d, wnd, vsi_ctl, ctl); 254 return (0); 255 } 256 257 void 258 univ_pci_unmappci(struct univ_pci_data *d, int wnd) 259 { 260 #ifdef UNIV_DEBUG 261 printf("%s: unmap PCI wnd %d\n", d->devname, wnd); 262 #endif 263 write_vmeslv(d, wnd, vsi_ctl, 0); 264 } 265 266 int 267 univ_pci_vmebuserr(struct univ_pci_data *d, int clear) 268 { 269 u_int32_t pcicsr; 270 271 pcicsr = read_csr_4(d, pci_csr); 272 if ((pcicsr & 0xf8000000) && clear) 273 write_csr_4(d, pci_csr, pcicsr | 0xf8000000); 274 return (pcicsr & 0x08000000); /* target abort */ 275 } 276 277 int 278 univ_pci_intr(void *v) 279 { 280 struct univ_pci_data *d = v; 281 u_int32_t intcsr; 282 int i, vec; 283 284 intcsr = read_csr_4(d, lint_stat) & 0xffffff; 285 if (!intcsr) 286 return (0); 287 288 /* ack everything */ 289 write_csr_4(d, lint_stat, intcsr); 290 #ifdef UNIV_DEBUG 291 printf("%s: intr, lint_stat=%x\n", d->devname, intcsr); 292 #endif 293 if (intcsr & 0x000000fe) { /* VME interrupt */ 294 for (i = 7; i >= 1; i--) { 295 if (!(intcsr & (1 << i))) 296 continue; 297 vec = read_csr_4(d, v_statid[i - 1]); 298 if (vec & 0x100) { 299 printf("%s: err irq %d\n", d->devname, i); 300 continue; 301 } 302 if (d->vmeinthandler) 303 (*d->vmeinthandler)(d->vmeintcookie, i, vec); 304 } 305 } 306 307 return (1); 308 } 309
Indexes created Sat Sep 20 22:09:52 GMT 2025