| X86TargetTransformInfo.cpp | 355 { ISD::SHL, MVT::v32i8, 2 }, // psllw + pand.
356 { ISD::SRL, MVT::v32i8, 2 }, // psrlw + pand.
357 { ISD::SRA, MVT::v32i8, 4 }, // psrlw, pand, pxor, psubb.
379 { ISD::SHL, MVT::v32i8, 4+2 }, // 2*(psllw + pand) + split.
380 { ISD::SRL, MVT::v32i8, 4+2 }, // 2*(psrlw + pand) + split.
381 { ISD::SRA, MVT::v32i8, 8+2 }, // 2*(psrlw, pand, pxor, psubb) + split.
444 { ISD::SDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence
445 { ISD::SREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence
446 { ISD::UDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence
447 { ISD::UREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequenc
1484 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, member in class:MVT
1485 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, member in class:MVT
1496 { ISD::SIGN_EXTEND, MVT::v32i8, MVT::v32i1, 1 }, member in class:MVT
1509 { ISD::ZERO_EXTEND, MVT::v32i8, MVT::v32i1, 2 }, member in class:MVT
1513 { ISD::TRUNCATE, MVT::v32i8, MVT::v32i16, 2 }, member in class:MVT
1523 { ISD::TRUNCATE, MVT::v32i1, MVT::v32i8, 2 }, \/\/ widen to zmm member in class:MVT
1671 { ISD::SIGN_EXTEND, MVT::v32i8, MVT::v32i1, 1 }, member in class:MVT
1682 { ISD::ZERO_EXTEND, MVT::v32i8, MVT::v32i1, 2 }, member in class:MVT
1693 { ISD::TRUNCATE, MVT::v32i1, MVT::v32i8, 2 }, \/\/ vpsllw+vptestmb member in class:MVT
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