| /src/sys/net/ |
| if_srt.h | 16 struct in_addr v4; member in union:srt_rt::__anonf60ca54e010a
|
| /src/usr.bin/netstat/ |
| vtw.c | 214 vtw_v4_t *v4 = (vtw_v4_t *)vp; local in function:process_vtw
216 vp = &(++v4)->common;
296 kbase = vtw_tcpv4[i].base.v4;
297 klim = vtw_tcpv4[i].lim.v4;
312 ubase = vtw_tcpv4[0].base.v4;
316 vtw_tcpv4[i].base.v4 += delta;
317 vtw_tcpv4[i].lim.v4 += delta;
318 vtw_tcpv4[i].alloc.v4 += delta;
321 if (vtw_tcpv4[i].oldest.v4)
322 vtw_tcpv4[i].oldest.v4 += delta
[all...] |
| inet.c | 192 const vtw_v4_t *v4 = (const vtw_v4_t *)vtw; local in function:print_vtw_v4
198 la.s_addr = v4->laddr;
199 fa.s_addr = v4->faddr;
208 buf[0], ntohs(v4->lport),
209 buf[1], ntohs(v4->fport));
216 buf[0], ntohs(v4->lport),
217 buf[1], ntohs(v4->fport));
221 buf[0], ntohs(v4->lport),
222 buf[1], ntohs(v4->fport),
226 &la, v4->lport
[all...] |
| /src/sys/crypto/blake2/ |
| blake2s.c | 94 uint32_t v0,v1,v2,v3,v4,v5,v6,v7,v8,v9,v10,v11,v12,v13,v14,v15; local in function:blake2s_compress
103 v4 = h[4];
129 BLAKE2S_G(v0, v4, v8, v12, m[sigma[ 0]], m[sigma[ 1]]);
136 BLAKE2S_G(v3, v4, v9, v14, m[sigma[14]], m[sigma[15]]);
144 h[4] ^= v4 ^ v12;
|
| /src/sys/arch/arm/arm32/ |
| fault.c | 958 uint32_t v4; member in union:badaddr_read::__anon749f6dd8010a
981 rv = badaddr_read_4(addr, &u.v4);
983 *(uint32_t *) rptr = u.v4;
|
| /src/lib/libm/src/ |
| e_lgammaf_r.c | 69 v4 = 1.0422264785e-01, /* 0x3dd572af */ variable in typeref:typename:const float
202 p2 = one+y*(v1+y*(v2+y*(v3+y*(v4+y*v5))));
|
| e_lgamma_r.c | 133 v4 = 1.04222645593369134254e-01, /* 0x3FBAAE55, 0xD6537C88 */ variable in typeref:typename:const double
266 p2 = one+y*(v1+y*(v2+y*(v3+y*(v4+y*v5))));
|
| /src/usr.sbin/npf/npfctl/ |
| npf_cmd.c | 413 bool v4; member in struct:__anon353fbb410108
442 fmt = fil->name ? "%A" : (fil->v4 ? "%a" : "[%a]");
473 f->v4 = alen == sizeof(struct in_addr);
474 f->pwidth = f->nowide ? 0 : ((f->v4 ? 15 : 40) + 1 + 5);
|
| /src/sys/external/bsd/compiler_rt/dist/lib/tsan/rtl/ |
| tsan_ppc_regs.h | 69 #define v4 4 macro
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_atombios_encoders.c | 573 DIG_ENCODER_CONTROL_PARAMETERS_V4 v4; member in union:dig_encoder_control
671 args.v4.ucAction = action;
672 args.v4.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
674 args.v4.ucPanelMode = panel_mode;
676 args.v4.ucEncoderMode = amdgpu_atombios_encoder_get_encoder_mode(encoder);
678 if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode))
679 args.v4.ucLaneNum = dp_lane_count;
681 args.v4.ucLaneNum = 8;
683 args.v4.ucLaneNum = 4;
685 if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode))
761 DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 v4; member in union:dig_transmitter_control
[all...] |
| amdgpu_atombios.c | 997 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 v4; member in union:get_clock_dividers
1064 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
1068 dividers->post_divider = dividers->post_div = args.v4.ucPostDiv;
1069 dividers->real_clock = le32_to_cpu(args.v4.ulClock);
|
| /src/sys/netinet/ |
| tcp_vtw.h | 253 struct vtw_v4 *v4; /* IPv4 resources */ member in union:vtw_ctl::__anone1a73b5e010a
375 struct in_addr v4; member in union:vestigial_inpcb::__anone1a73b5e020a
380 uint32_t v4 : 1; member in struct:vestigial_inpcb
405 struct in_addr v4; member in union:sin_either::__anone1a73b5e030a
|
| tcp_vtw.c | 147 struct in_addr v4; member in union:tcp_ports_iterator::__anone1a73b59010a
418 vtw_index_v4(vtw_ctl_t *ctl, vtw_v4_t *v4)
420 if (ctl->base.v4 <= v4 && v4 <= ctl->lim.v4)
421 return v4 - ctl->base.v4;
470 vtw_v4_t *vtw = ctl->base.v4 + idx;
472 return (ctl->base.v4 <= vtw && vtw <= ctl->lim.v4
496 vtw_v4_t *v4 = (void*)vtw; local in function:vtw_next
520 vtw_v4_t *v4 = (void*)vtw; local in function:vtw_unhash
709 vtw_v4_t *v4 = (void*)vtw; local in function:vtw_inshash_v4
777 vtw_v4_t *v4; local in function:vtw_lookup_hash_v4
1028 vtw_v4_t *v4; local in function:vtw_next_port_v4
1604 vtw_v4_t *v4 = (void*)vtw; local in function:vtw_export_v4
1904 vtw_v4_t *v4 = (void*)vtw; local in function:vtw_add
2077 vtw_v4_t *v4 = (void*)vtw; local in function:vtw_restart_v4
2244 vtw_v4_t *v4 = (void*)vtw; local in function:vtw_debug_add
[all...] |
| /src/lib/libm/ld80/ |
| e_lgammal_r.c | 143 #define v4 (v4u.extu_ld) macro
320 p2 = 1+y*(v1+y*(v2+y*(v3+y*(v4+y*(v5+y*v6)))));
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_atombios_encoders.c | 847 DIG_ENCODER_CONTROL_PARAMETERS_V4 v4; member in union:dig_encoder_control
957 args.v4.ucAction = action;
958 args.v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
960 args.v4.ucPanelMode = panel_mode;
962 args.v4.ucEncoderMode = atombios_get_encoder_mode(encoder);
964 if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode))
965 args.v4.ucLaneNum = dp_lane_count;
967 args.v4.ucLaneNum = 8;
969 args.v4.ucLaneNum = 4;
971 if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode))
1016 DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 v4; member in union:dig_transmitter_control
[all...] |
| radeon_atombios.c | 2826 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 v4; member in union:get_clock_dividers
2920 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
2924 dividers->post_divider = dividers->post_div = args.v4.ucPostDiv;
2925 dividers->real_clock = le32_to_cpu(args.v4.ulClock);
|
| /src/sys/dev/pci/ |
| if_jme.c | 1340 bool v4 = (m->m_pkthdr.csum_flags & M_CSUM_TSOv4) != 0; local in function:jme_encap
1341 int iphl = v4 ?
1362 if (v4) {
1397 if (v4) {
|
| if_vmx.c | 2991 bool v4; local in function:vmxnet3_txq_offload_ctx
3010 v4 = true;
3013 v4 = false;
3037 if (v4) {
|
| /src/lib/libm/ld128/ |
| e_lgammal_r.c | 121 v4 = 1.07170702656179582805791063277960532e+01L, variable in typeref:typename:const long double
291 p2 = one+y*(v1+y*(v2+y*(v3+y*(v4+y*(v5+y*(v6+y*(v7+
|
| /src/sys/dev/i2c/ |
| dbcool.c | 1050 uint8_t ext = 0, v1, v2, v3, v4, val; local in function:dbcool_read_volt
1090 v4 = sc->sc_dc.dc_readreg(&sc->sc_dc, DBCOOL_5VIN);
1105 val = v4;
|
| /src/sys/external/bsd/gnu-efi/dist/inc/ |
| efipxebc.h | 41 EFI_IPv4_ADDRESS v4; member in union:__anon19924e77010a
|
| /src/sys/dev/pci/ixgbe/ |
| ixv.c | 1287 u64 v0, v1, v2, v3, v4, v5, v6, v7; local in function:ixv_handle_timer
1303 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0;
1312 v4 += txr->q_other_tx_dma_setup;
1321 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4);
|
| ixgbe.c | 4618 u64 v0, v1, v2, v3, v4, v5, v6, v7; local in function:ixgbe_handle_timer
4657 v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0;
4666 v4 += txr->q_other_tx_dma_setup;
4675 IXGBE_EVC_STORE(&sc->other_tx_dma_setup, v4);
|
| /src/sys/dev/pci/igc/ |
| if_igc.c | 3188 const bool v4 = (csum_flags & local in function:igc_tx_ctx_setup
3215 if (!v4 && !v6)
3272 KASSERT(!v4 && !v6);
|
| /src/sys/net/npf/ |
| npf.h | 183 struct ip * v4; member in union:__anonb49106fe0208::__anonb49106fe030a
|
