| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| amdgpu_dce120_timing_generator.c | 643 uint32_t *v_blank_end,
658 *v_blank_end = get_reg_field_value(v_blank_start_end,
1107 uint32_t v_blank_start, v_blank_end, h_position, v_position; local in function:dce120_arm_vert_intr
1112 &v_blank_end,
1116 if (v_blank_start == 0 || v_blank_end == 0)
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_timing_generator.c | 578 uint32_t *v_blank_end,
591 *v_blank_end = get_reg_field_value(value,
2063 uint32_t v_blank_end = 0; local in function:dce110_arm_vert_intr
2070 &v_blank_end,
2074 if (v_blank_start == 0 || v_blank_end == 0)
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_dpp_dscl.c | 127 uint32_t v_blank_end = 0; local in function:dpp1_dscl_set_otg_blank
135 OTG_V_BLANK_END, v_blank_end);
|
| amdgpu_dcn10_optc.c | 1173 uint32_t *v_blank_end,
1182 OTG_V_BLANK_END, v_blank_end);
1264 hw_crtc_timing->v_addressable = s.v_total - ((s.v_total - s.v_blank_start) + s.v_blank_end);
1280 OTG_V_BLANK_END, &s->v_blank_end);
1328 uint32_t v_blank_end; local in function:optc1_get_otg_active_size
1342 OTG_V_BLANK_END, &v_blank_end);
1348 *otg_active_width = v_blank_start - v_blank_end;
|
| dcn10_optc.h | 521 uint32_t v_blank_end; member in struct:dcn_otg_state
591 uint32_t *v_blank_end,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm.c | 213 uint32_t v_blank_start, v_blank_end, h_position, v_position; local in function:dm_crtc_get_scanoutpos
234 &v_blank_end,
239 *vbl = v_blank_start | (v_blank_end << 16);
312 uint32_t vpos, hpos, v_blank_start, v_blank_end; local in function:dm_pflip_high_irq
349 &v_blank_end, &hpos, &vpos) ||
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