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      1 /*	$NetBSD: amdgpu_vega12_thermal.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2017 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  */
     25 
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: amdgpu_vega12_thermal.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $");
     28 
     29 #include "vega12_thermal.h"
     30 #include "vega12_hwmgr.h"
     31 #include "vega12_smumgr.h"
     32 #include "vega12_ppsmc.h"
     33 #include "vega12_inc.h"
     34 #include "soc15_common.h"
     35 #include "pp_debug.h"
     36 
     37 static int vega12_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm)
     38 {
     39 	PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
     40 				PPSMC_MSG_GetCurrentRpm),
     41 			"Attempt to get current RPM from SMC Failed!",
     42 			return -EINVAL);
     43 	*current_rpm = smum_get_argument(hwmgr);
     44 
     45 	return 0;
     46 }
     47 
     48 int vega12_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
     49 		struct phm_fan_speed_info *fan_speed_info)
     50 {
     51 	memset(fan_speed_info, 0, sizeof(*fan_speed_info));
     52 	fan_speed_info->supports_percent_read = false;
     53 	fan_speed_info->supports_percent_write = false;
     54 	fan_speed_info->supports_rpm_read = true;
     55 	fan_speed_info->supports_rpm_write = true;
     56 
     57 	return 0;
     58 }
     59 
     60 int vega12_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
     61 {
     62 	*speed = 0;
     63 
     64 	return vega12_get_current_rpm(hwmgr, speed);
     65 }
     66 
     67 /**
     68  * @fn vega12_enable_fan_control_feature
     69  * @brief Enables the SMC Fan Control Feature.
     70  *
     71  * @param    hwmgr - the address of the powerplay hardware manager.
     72  * @return   0 on success. -1 otherwise.
     73  */
     74 static int vega12_enable_fan_control_feature(struct pp_hwmgr *hwmgr)
     75 {
     76 #if 0
     77 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
     78 
     79 	if (data->smu_features[GNLD_FAN_CONTROL].supported) {
     80 		PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
     81 				hwmgr, true,
     82 				data->smu_features[GNLD_FAN_CONTROL].
     83 				smu_feature_bitmap),
     84 				"Attempt to Enable FAN CONTROL feature Failed!",
     85 				return -1);
     86 		data->smu_features[GNLD_FAN_CONTROL].enabled = true;
     87 	}
     88 #endif
     89 	return 0;
     90 }
     91 
     92 static int vega12_disable_fan_control_feature(struct pp_hwmgr *hwmgr)
     93 {
     94 #if 0
     95 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
     96 
     97 	if (data->smu_features[GNLD_FAN_CONTROL].supported) {
     98 		PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
     99 				hwmgr, false,
    100 				data->smu_features[GNLD_FAN_CONTROL].
    101 				smu_feature_bitmap),
    102 				"Attempt to Enable FAN CONTROL feature Failed!",
    103 				return -1);
    104 		data->smu_features[GNLD_FAN_CONTROL].enabled = false;
    105 	}
    106 #endif
    107 	return 0;
    108 }
    109 
    110 int vega12_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
    111 {
    112 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
    113 
    114 	if (data->smu_features[GNLD_FAN_CONTROL].supported)
    115 		PP_ASSERT_WITH_CODE(
    116 				!vega12_enable_fan_control_feature(hwmgr),
    117 				"Attempt to Enable SMC FAN CONTROL Feature Failed!",
    118 				return -1);
    119 
    120 	return 0;
    121 }
    122 
    123 
    124 int vega12_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr)
    125 {
    126 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
    127 
    128 	if (data->smu_features[GNLD_FAN_CONTROL].supported)
    129 		PP_ASSERT_WITH_CODE(!vega12_disable_fan_control_feature(hwmgr),
    130 				"Attempt to Disable SMC FAN CONTROL Feature Failed!",
    131 				return -1);
    132 
    133 	return 0;
    134 }
    135 
    136 /**
    137 * Reset Fan Speed to default.
    138 * @param    hwmgr  the address of the powerplay hardware manager.
    139 * @exception Always succeeds.
    140 */
    141 int vega12_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr)
    142 {
    143 	return vega12_fan_ctrl_start_smc_fan_control(hwmgr);
    144 }
    145 
    146 /**
    147 * Reads the remote temperature from the SIslands thermal controller.
    148 *
    149 * @param    hwmgr The address of the hardware manager.
    150 */
    151 int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr)
    152 {
    153 	struct amdgpu_device *adev = hwmgr->adev;
    154 	int temp = 0;
    155 
    156 	temp = RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS);
    157 
    158 	temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
    159 			CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
    160 
    161 	temp = temp & 0x1ff;
    162 
    163 	temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
    164 	return temp;
    165 }
    166 
    167 /**
    168 * Set the requested temperature range for high and low alert signals
    169 *
    170 * @param    hwmgr The address of the hardware manager.
    171 * @param    range Temperature range to be programmed for
    172 *           high and low alert signals
    173 * @exception PP_Result_BadInput if the input data is not valid.
    174 */
    175 static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
    176 		struct PP_TemperatureRange *range)
    177 {
    178 	struct amdgpu_device *adev = hwmgr->adev;
    179 	int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
    180 			PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
    181 	int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
    182 			PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
    183 	uint32_t val;
    184 
    185 	if (low < range->min)
    186 		low = range->min;
    187 	if (high > range->max)
    188 		high = range->max;
    189 
    190 	if (low > high)
    191 		return -EINVAL;
    192 
    193 	val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);
    194 
    195 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
    196 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
    197 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
    198 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
    199 	val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
    200 
    201 	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
    202 
    203 	return 0;
    204 }
    205 
    206 /**
    207 * Enable thermal alerts on the RV770 thermal controller.
    208 *
    209 * @param    hwmgr The address of the hardware manager.
    210 */
    211 static int vega12_thermal_enable_alert(struct pp_hwmgr *hwmgr)
    212 {
    213 	struct amdgpu_device *adev = hwmgr->adev;
    214 	uint32_t val = 0;
    215 
    216 	val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);
    217 	val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);
    218 	val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);
    219 
    220 	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);
    221 
    222 	return 0;
    223 }
    224 
    225 /**
    226 * Disable thermal alerts on the RV770 thermal controller.
    227 * @param    hwmgr The address of the hardware manager.
    228 */
    229 int vega12_thermal_disable_alert(struct pp_hwmgr *hwmgr)
    230 {
    231 	struct amdgpu_device *adev = hwmgr->adev;
    232 
    233 	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);
    234 
    235 	return 0;
    236 }
    237 
    238 /**
    239 * Uninitialize the thermal controller.
    240 * Currently just disables alerts.
    241 * @param    hwmgr The address of the hardware manager.
    242 */
    243 int vega12_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
    244 {
    245 	int result = vega12_thermal_disable_alert(hwmgr);
    246 
    247 	return result;
    248 }
    249 
    250 /**
    251 * Set up the fan table to control the fan using the SMC.
    252 * @param    hwmgr  the address of the powerplay hardware manager.
    253 * @param    pInput the pointer to input data
    254 * @param    pOutput the pointer to output data
    255 * @param    pStorage the pointer to temporary storage
    256 * @param    Result the last failure code
    257 * @return   result from set temperature range routine
    258 */
    259 int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
    260 {
    261 	int ret;
    262 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
    263 	PPTable_t *table = &(data->smc_state_table.pp_table);
    264 
    265 	ret = smum_send_msg_to_smc_with_parameter(hwmgr,
    266 				PPSMC_MSG_SetFanTemperatureTarget,
    267 				(uint32_t)table->FanTargetTemperature);
    268 
    269 	return ret;
    270 }
    271 
    272 /**
    273 * Start the fan control on the SMC.
    274 * @param    hwmgr  the address of the powerplay hardware manager.
    275 * @param    pInput the pointer to input data
    276 * @param    pOutput the pointer to output data
    277 * @param    pStorage the pointer to temporary storage
    278 * @param    Result the last failure code
    279 * @return   result from set temperature range routine
    280 */
    281 int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
    282 {
    283 	/* If the fantable setup has failed we could have disabled
    284 	 * PHM_PlatformCaps_MicrocodeFanControl even after
    285 	 * this function was included in the table.
    286 	 * Make sure that we still think controlling the fan is OK.
    287 	 */
    288 	if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
    289 		vega12_fan_ctrl_start_smc_fan_control(hwmgr);
    290 
    291 	return 0;
    292 }
    293 
    294 
    295 int vega12_start_thermal_controller(struct pp_hwmgr *hwmgr,
    296 				struct PP_TemperatureRange *range)
    297 {
    298 	int ret = 0;
    299 
    300 	if (range == NULL)
    301 		return -EINVAL;
    302 
    303 	ret = vega12_thermal_set_temperature_range(hwmgr, range);
    304 	if (ret)
    305 		return -EINVAL;
    306 
    307 	vega12_thermal_enable_alert(hwmgr);
    308 	/* We should restrict performance levels to low before we halt the SMC.
    309 	 * On the other hand we are still in boot state when we do this
    310 	 * so it would be pointless.
    311 	 * If this assumption changes we have to revisit this table.
    312 	 */
    313 	ret = vega12_thermal_setup_fan_table(hwmgr);
    314 	if (ret)
    315 		return -EINVAL;
    316 
    317 	vega12_thermal_start_smc_fan_control(hwmgr);
    318 
    319 	return 0;
    320 };
    321