| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| i965_video.c | 512 struct brw_vs_unit_state *vs_state; local
515 &vs_bo, &vs_state) != 0)
520 vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
522 vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
523 vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
524 vs_state->vs6.vs_enable = 0;
525 vs_state->vs6.vert_cache_disable = 1;
|
| i965_render.c | 938 struct brw_vs_unit_state vs_state; local
939 memset(&vs_state, 0, sizeof(vs_state));
943 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */
945 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
946 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
947 vs_state.vs6.vs_enable = 0;
948 vs_state.vs6.vert_cache_disable = 1;
950 return intel_bo_alloc_for_data(scrn, &vs_state, sizeof(vs_state),
[all...] |
| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| i965_video.c | 623 struct brw_vs_unit_state vs_state; local
626 memset(&vs_state, 0, sizeof(vs_state));
628 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
630 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
631 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
632 vs_state.vs6.vs_enable = 0;
633 vs_state.vs6.vert_cache_disable = 1;
636 &vs_state, sizeof(vs_state),
[all...] |
| i965_render.c | 1211 struct brw_vs_unit_state vs_state; local
1212 memset(&vs_state, 0, sizeof(vs_state));
1216 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */
1218 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
1219 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
1220 vs_state.vs6.vs_enable = 0;
1221 vs_state.vs6.vert_cache_disable = 1;
1223 return intel_uxa_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state),
[all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| i965_video.c | 624 struct brw_vs_unit_state vs_state; local
627 memset(&vs_state, 0, sizeof(vs_state));
629 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
631 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
632 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
633 vs_state.vs6.vs_enable = 0;
634 vs_state.vs6.vert_cache_disable = 1;
637 &vs_state, sizeof(vs_state),
[all...] |
| i965_render.c | 1211 struct brw_vs_unit_state vs_state; local
1212 memset(&vs_state, 0, sizeof(vs_state));
1216 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */
1218 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
1219 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
1220 vs_state.vs6.vs_enable = 0;
1221 vs_state.vs6.vert_cache_disable = 1;
1223 return intel_uxa_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state),
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/ |
| r300_context.h | 526 struct r300_atom vs_state; member in struct:r300_context
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/ |
| r300_context.h | 526 struct r300_atom vs_state; member in struct:r300_context
|
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| sna_render.h | 456 uint32_t vs_state; member in struct:gen6_render_state
513 uint32_t vs_state; member in struct:gen7_render_state
572 uint32_t vs_state; member in struct:gen8_render_state
632 uint32_t vs_state; member in struct:gen9_render_state
|
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| sna_render.h | 442 uint32_t vs_state; member in struct:gen6_render_state
492 uint32_t vs_state; member in struct:gen7_render_state
544 uint32_t vs_state; member in struct:gen8_render_state
|
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_cmd_buffer.c | 3317 struct radv_vs_input_state *vs_state = local
3324 assert(!vs_state || pipeline->use_per_attribute_vb_descs);
3331 vs_state ? cmd_buffer->state.dynamic_vs_input.bindings[i]
3337 if (vs_state) {
3338 unsigned format = vs_state->formats[i];
3343 vs_state->post_shuffle & (1u << i) ? DST_SEL_ZYXW : data_format_dst_sel[dfmt];
3358 if (vs_state) {
3377 if (vs_state)
3378 va += vs_state->offsets[i];
3393 uint32_t attrib_end = vs_state ? vs_state->offsets[i] + vs_state->format_sizes[i
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| si_shader.c | 1928 LLVMValueRef vs_state = LLVMGetParam(ctx->main_fn, local
1932 indexed = LLVMBuildLShr(ctx->ac.builder, vs_state, ctx->i32_1, "");
|
