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    Searched defs:vvvv (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/Disassembler/
X86Disassembler.cpp 846 insn->vvvv =
847 (Reg)fixupRegValue(insn, (OperandType)op->type, insn->vvvv, &valid);
1442 // Consume vvvv from an instruction if it has a VEX prefix.
1446 int vvvv; local
1448 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 |
1451 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]);
1453 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]);
1455 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]);
1460 vvvv &= 0xf; // Can only clear bit 4. Bit 3 must be cleared later.
1462 insn->vvvv = static_cast<Reg>(vvvv)
    [all...]
X86DisassemblerDecoder.h 592 // The VEX.vvvv field, which contains a third register operand for some AVX
594 Reg vvvv; member in struct:llvm::X86Disassembler::InternalInstruction
  /src/external/gpl3/gdb/dist/gdb/
i386-tdep.c 4481 uint8_t vvvv;
5180 ir.vvvv = (~(byte >> 3) & 0xf);
5203 ir.vvvv = (~(byte >> 3) & 0xf);
4457 uint8_t vvvv; member in struct:i386_record_s

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