| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_dpll_mgr.h | 178 u32 wrpll; member in struct:intel_dpll_hw_state
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| intel_ddi.c | 1280 u32 wrpll; local in function:hsw_ddi_calc_wrpll_link
1282 wrpll = I915_READ(reg);
1283 switch (wrpll & WRPLL_REF_MASK) {
1310 MISSING_CASE(wrpll);
1314 r = wrpll & WRPLL_DIVIDER_REF_MASK;
1315 p = (wrpll & WRPLL_DIVIDER_POST_MASK) >> WRPLL_DIVIDER_POST_SHIFT;
1316 n = (wrpll & WRPLL_DIVIDER_FB_MASK) >> WRPLL_DIVIDER_FB_SHIFT;
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| intel_dpll_mgr.c | 514 I915_WRITE(WRPLL_CTL(id), pll->state.hw_state.wrpll);
577 hw_state->wrpll = val;
836 crtc_state->dpll_hw_state.wrpll = val;
923 DRM_DEBUG_KMS("dpll_hw_state: wrpll: 0x%x spll: 0x%x\n",
924 hw_state->wrpll, hw_state->spll);
1982 { "WRPLL 1", &hsw_ddi_wrpll_funcs, DPLL_ID_WRPLL1, 0 },
1983 { "WRPLL 2", &hsw_ddi_wrpll_funcs, DPLL_ID_WRPLL2, 0 },
2475 struct skl_wrpll_params wrpll; member in struct:icl_combo_pll_params
2573 *pll_params = params[i].wrpll;
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