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      1 /*	$NetBSD: z8530var.h,v 1.15 2025/04/25 21:06:41 andvar Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. Neither the name of the University nor the names of its contributors
     25  *    may be used to endorse or promote products derived from this software
     26  *    without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     38  * SUCH DAMAGE.
     39  *
     40  *	@(#)zsvar.h	8.1 (Berkeley) 6/11/93
     41  */
     42 
     43 /*
     44  * Copyright (c) 1994 Gordon W. Ross
     45  *
     46  * This software was developed by the Computer Systems Engineering group
     47  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
     48  * contributed to Berkeley.
     49  *
     50  * All advertising materials mentioning features or use of this software
     51  * must display the following acknowledgement:
     52  *	This product includes software developed by the University of
     53  *	California, Lawrence Berkeley Laboratory.
     54  *
     55  * Redistribution and use in source and binary forms, with or without
     56  * modification, are permitted provided that the following conditions
     57  * are met:
     58  * 1. Redistributions of source code must retain the above copyright
     59  *    notice, this list of conditions and the following disclaimer.
     60  * 2. Redistributions in binary form must reproduce the above copyright
     61  *    notice, this list of conditions and the following disclaimer in the
     62  *    documentation and/or other materials provided with the distribution.
     63  * 3. All advertising materials mentioning features or use of this software
     64  *    must display the following acknowledgement:
     65  *	This product includes software developed by the University of
     66  *	California, Berkeley and its contributors.
     67  * 4. Neither the name of the University nor the names of its contributors
     68  *    may be used to endorse or promote products derived from this software
     69  *    without specific prior written permission.
     70  *
     71  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     72  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     73  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     74  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     75  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     76  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     77  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     78  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     79  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     80  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     81  * SUCH DAMAGE.
     82  *
     83  *	@(#)zsvar.h	8.1 (Berkeley) 6/11/93
     84  */
     85 
     86 #include <dev/ic/z8530sc.h>
     87 #include <macppc/dev/dbdma.h>
     88 
     89 /*
     90  * Clock source info structure, added here so xzs_chanstate works
     91  */
     92 struct zsclksrc {
     93 	long    clk;    /* clock rate, in MHz, present on signal line */
     94 	int     flags;  /* Specifies how this source can be used
     95 			   (RTxC divided, RTxC BRG, PCLK BRG, TRxC divided)
     96 			   and also if the source is "external" and if it
     97 			   is changeable (by an ioctl ex.). The
     98 			   source usage flags are used by the tty
     99 			   child. The other bits tell zsloadchannelregs
    100 			   if it should call an md signal source
    101 			   changing routine. ZSC_VARIABLE says if
    102 			   an ioctl should be able to change the
    103 			   clock rate.*/
    104 };
    105 #define ZSC_PCLK        0x01
    106 #define ZSC_RTXBRG      0x02
    107 #define ZSC_RTXDIV      0x04
    108 #define ZSC_TRXDIV      0x08
    109 #define ZSC_VARIABLE    0x40
    110 #define ZSC_EXTERN      0x80
    111 
    112 #define ZSC_BRG         0x03
    113 #define ZSC_DIV         0x0c
    114 
    115 
    116 /*
    117  * These are the machine-dependent (extended) variants of
    118  * struct zs_chanstate and struct zsc_softc
    119  */
    120 struct xzs_chanstate {
    121 	/* machine-independent part (First!)*/
    122 	struct zs_chanstate xzs_cs;
    123 	/* machine-dependent extensions */
    124 	int cs_hwflags;
    125 	int	cs_chip;		/* type of chip */
    126 	/* Clock source info... */
    127 	int	cs_clock_count;		/* how many signal sources available */
    128 	struct zsclksrc cs_clocks[4];	/* info on available signal sources */
    129 	long	cs_cclk_flag;		/* flag for current clock source */
    130 	long	cs_pclk_flag;		/* flag for pending clock source */
    131 	int	cs_csource;		/* current source # */
    132 	int	cs_psource;		/* pending source # */
    133 };
    134 
    135 struct zsc_softc {
    136 	device_t zsc_dev;		/* required first: base device */
    137 	struct	zs_chanstate *zsc_cs[2];	/* channel A and B soft state */
    138 	/* Machine-dependent part follows... */
    139 	struct xzs_chanstate xzsc_xcs_store[2];
    140 	dbdma_regmap_t *zsc_txdmareg[2];
    141 	dbdma_command_t *zsc_txdmacmd[2];
    142 	/* XXX tx only, for now */
    143 	void *zsc_si;			/* softintr handler */
    144 };
    145 
    146 /*
    147  * Functions to read and write individual registers in a channel.
    148  * The ZS chip requires a 1.6 uSec. recovery time between accesses,
    149  * and the Sun3 hardware does NOT take care of this for you.
    150  * MacII hardware DOES dake care of the delay for us. :-)
    151  * XXX - Then these should be inline functions! -gwr
    152  * Some clock-chirped macs loose serial ports. It could be that the
    153  * hardware delay is tied to the CPU speed, and that the minimum delay
    154  * no longer's respected. For them, ZS_DELAY might help.
    155  * XXX - no one seems to want to try and check this -wrs
    156  */
    157 
    158 uint8_t zs_read_reg(struct zs_chanstate *cs, uint8_t reg);
    159 uint8_t zs_read_csr(struct zs_chanstate *cs);
    160 uint8_t zs_read_data(struct zs_chanstate *cs);
    161 
    162 void  zs_write_reg(struct zs_chanstate *cs, uint8_t reg,uint8_t val);
    163 void  zs_write_csr(struct zs_chanstate *cs, uint8_t val);
    164 void  zs_write_data(struct zs_chanstate *cs, uint8_t val);
    165 
    166 /* XXX - Could define splzs() here instead of in psl.h */
    167 #define splzs spltty
    168 #define	IPL_ZS IPL_TTY
    169 
    170 /* Hook for MD ioctl support */
    171 int	zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data);
    172 /* XXX - This is a bit gross... */
    173 #define ZS_MD_IOCTL(cs, cmd, data) zsmdioctl(cs, cmd, data)
    174 
    175 /* Callback for "external" clock sources */
    176 void zsmd_setclock(struct zs_chanstate *cs);
    177 #define ZS_MD_SETCLK(cs) zsmd_setclock(cs)
    178 
    179 #define PCLK	(9600 * 384)	/* PCLK pin input clock rate */
    180 
    181 /* The layout of this is hardware-dependent (padding, order). */
    182 struct zschan {
    183 	volatile uint8_t zc_csr;	/* ctrl,status, and indirect access */
    184 	uint8_t		zc_xxx0[15];
    185 	volatile uint8_t zc_data;	/* data */
    186 	uint8_t		zc_xxx1[15];
    187 };
    188 void	zs_putc(void *, int);
    189 int	zs_getc(void *);
    190 void zs_kgdb_init(void);
    191 
    192 #ifdef ZS_TXDMA
    193 void zstty_txdma_int(void *);
    194 void zs_dma_setup(struct zs_chanstate *, void *, int);
    195 #endif
    196