| /src/crypto/external/apache2/openssl/dist/crypto/aes/asm/ |
| aes-riscv64-zvbb-zvkg-zvkned.pl | 79 $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
88 @{[vle32_v $V29, $KEY2]}
89 @{[vaesz_vs $V28, $V29]}
93 @{[vle32_v $V29, $KEY2]}
94 @{[vaesem_vs $V28, $V29]}
98 @{[vle32_v $V29, $KEY2]}
99 @{[vaesef_vs $V28, $V29]}
224 # prepare xts dec second to last block's input(v24) and iv(v29) and
258 @{[vbrev8_v $V29, $V16]}
264 @{[vbrev8_v $V29, $V16]
[all...] |
| aes-riscv64-zvkb-zvkned.pl | 77 $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
|
| aes-riscv64-zvkned.pl | 64 $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
|
| /src/crypto/external/apache2/openssl/dist/crypto/chacha/asm/ |
| chacha-riscv64-v-zbb.pl | 94 $V22, $V23, $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
454 @{[vxor_vv $V29, $V29, $V13]}
|
| /src/crypto/external/apache2/openssl/dist/crypto/sha/asm/ |
| sha512-riscv64-zvkb-zvknhb.pl | 66 $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
|
| sha256-riscv64-zvkb-zvknha_or_zvknhb.pl | 66 $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
|
| /src/crypto/external/apache2/openssl/dist/crypto/sm3/asm/ |
| sm3-riscv64-zvksh.pl | 70 $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
|
| /src/external/gpl3/gdb/dist/sim/aarch64/ |
| cpustate.h | 121 V29,
|
| /src/external/gpl3/gdb.old/dist/sim/aarch64/ |
| cpustate.h | 121 V29,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCTargetDesc.cpp | 110 SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 83 V28, V29, V30, V31, 0
|
| /src/crypto/external/apache2/openssl/dist/crypto/modes/asm/ |
| aes-gcm-riscv64-zvkb-zvkg-zvkned.pl | 92 $V24, $V25, $V26, $V27, $V28, $V29, $V30, $V31,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 582 Hexagon::V25, Hexagon::V26, Hexagon::V27, Hexagon::V28, Hexagon::V29,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/Disassembler/ |
| VEDisassembler.cpp | 102 VE::V24, VE::V25, VE::V26, VE::V27, VE::V28, VE::V29, VE::V30, VE::V31,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 163 {PPC::V29, -48}, \
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.cpp | 8192 .Case("{v29}", RISCV::V29)
|
