| /src/sys/arch/usermode/include/ |
| genheaders.sh | 28 for hdr in ${HDRS}; do
29 G="_USERMODE_$(echo ${hdr} | sed 's/\./_/g' | tr [a-z] [A-Z])"
31 cat > ${hdr} << EOF
42 #include "../../i386/include/${hdr}"
44 #include "../../amd64/include/${hdr}"
46 #include "../../arm/include/${hdr}"
53 if [ "$hdr" = "disklabel.h" ]; then
54 echo "#include <machine/types.h>" >> ${hdr}
55 echo "#ifndef __HAVE_OLD_DISKLABEL" >> ${hdr}
56 echo "#undef DISKUNIT" >> ${hdr}
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/nvfw/ |
| nouveau_nvkm_nvfw_flcn.c | 31 loader_config_dump(struct nvkm_subdev *subdev, const struct loader_config *hdr)
34 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx);
35 nvkm_debug(subdev, "\tcodeDmaBase : 0x%xx\n", hdr->code_dma_base);
36 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total);
37 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load);
38 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point);
39 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base);
40 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size);
41 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base);
42 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc)
[all...] |
| nouveau_nvkm_nvfw_fw.c | 33 const struct nvfw_bin_hdr *hdr = data; local in function:nvfw_bin_hdr
35 nvkm_debug(subdev, "\tbinMagic : 0x%08x\n", hdr->bin_magic);
36 nvkm_debug(subdev, "\tbinVer : %d\n", hdr->bin_ver);
37 nvkm_debug(subdev, "\tbinSize : %d\n", hdr->bin_size);
38 nvkm_debug(subdev, "\theaderOffset : 0x%x\n", hdr->header_offset);
39 nvkm_debug(subdev, "\tdataOffset : 0x%x\n", hdr->data_offset);
40 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size);
41 return hdr;
47 const struct nvfw_bl_desc *hdr = data; local in function:nvfw_bl_desc
49 nvkm_debug(subdev, "\tstartTag : 0x%x\n", hdr->start_tag)
[all...] |
| nouveau_nvkm_nvfw_ls.c | 32 const struct nvfw_ls_desc_head *hdr)
38 hdr->descriptor_size);
39 nvkm_debug(subdev, "\timageSize : %d\n", hdr->image_size);
41 hdr->tools_version);
42 nvkm_debug(subdev, "\tappVersion : 0x%x\n", hdr->app_version);
44 date = kstrndup(hdr->date, sizeof(hdr->date), GFP_KERNEL);
49 hdr->bootloader_start_offset);
51 hdr->bootloader_size);
53 hdr->bootloader_imem_offset)
79 const struct nvfw_ls_desc *hdr = data; local in function:nvfw_ls_desc
97 const struct nvfw_ls_desc_v1 *hdr = data; local in function:nvfw_ls_desc_v1
[all...] |
| nouveau_nvkm_nvfw_hs.c | 33 const struct nvfw_hs_header *hdr = data; local in function:nvfw_hs_header
35 nvkm_debug(subdev, "\tsigDbgOffset : 0x%x\n", hdr->sig_dbg_offset);
36 nvkm_debug(subdev, "\tsigDbgSize : 0x%x\n", hdr->sig_dbg_size);
37 nvkm_debug(subdev, "\tsigProdOffset : 0x%x\n", hdr->sig_prod_offset);
38 nvkm_debug(subdev, "\tsigProdSize : 0x%x\n", hdr->sig_prod_size);
39 nvkm_debug(subdev, "\tpatchLoc : 0x%x\n", hdr->patch_loc);
40 nvkm_debug(subdev, "\tpatchSig : 0x%x\n", hdr->patch_sig);
41 nvkm_debug(subdev, "\thdrOffset : 0x%x\n", hdr->hdr_offset);
42 nvkm_debug(subdev, "\thdrSize : 0x%x\n", hdr->hdr_size);
43 return hdr;
49 const struct nvfw_hs_load_header *hdr = data; local in function:nvfw_hs_load_header
[all...] |
| nouveau_nvkm_nvfw_acr.c | 31 wpr_header_dump(struct nvkm_subdev *subdev, const struct wpr_header *hdr)
34 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id);
35 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset);
36 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner);
37 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap);
38 nvkm_debug(subdev, "\tstatus : %d\n", hdr->status);
42 wpr_header_v1_dump(struct nvkm_subdev *subdev, const struct wpr_header_v1 *hdr)
45 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id);
46 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset);
47 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner)
[all...] |
| /src/sys/dev/raidframe/ |
| rf_cvscan.c | 54 CheckCvscanState(RF_CvscanHeader_t *hdr)
59 if (hdr->left != NULL)
60 RF_ASSERT(hdr->left->sectorOffset < hdr->cur_block);
61 for (key = hdr->cur_block, i = 0, tmp = hdr->left;
65 && tmp->priority == hdr->nxt_priority && pri_ok(tmp->priority));
66 RF_ASSERT(i == hdr->left_cnt);
68 for (key = hdr->cur_block, i = 0, tmp = hdr->right
208 RF_CvscanHeader_t *hdr = (RF_CvscanHeader_t *) q_in; local in function:rf_CvscanEnqueue
217 RF_CvscanHeader_t *hdr = (RF_CvscanHeader_t *) q_in; local in function:rf_CvscanDequeue
287 RF_CvscanHeader_t *hdr; local in function:rf_CvscanCreate
352 RF_CvscanHeader_t *hdr = (RF_CvscanHeader_t *) q_in; local in function:rf_CvscanPromote
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_ucode.c | 36 static void radeon_ucode_print_common_hdr(const struct common_firmware_header *hdr)
38 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
39 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
40 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
41 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
42 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
43 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
44 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
45 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
47 le32_to_cpu(hdr->ucode_array_offset_bytes))
164 const struct common_firmware_header *hdr = local in function:radeon_ucode_validate
[all...] |
| /src/lib/libedit/ |
| makelist | 56 hdr="_h_`basename $1`"
60 printf("#ifndef %s\n#define %s\n", "'$hdr'", "'$hdr'");
75 printf("#endif /* %s */\n", "'$hdr'");
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| nouveau_nvkm_engine_gr_gp108.c | 36 struct flcn_bl_dmem_desc_v2 hdr; local in function:gp108_gr_acr_bld_patch
37 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr));
38 hdr.code_dma_base = hdr.code_dma_base + adjust;
39 hdr.data_dma_base = hdr.data_dma_base + adjust;
40 nvkm_wobj(acr->wpr, bld, &hdr, sizeof(hdr));
41 flcn_bl_dmem_desc_v2_dump(&acr->subdev, &hdr);
51 const struct flcn_bl_dmem_desc_v2 hdr = { local in function:gp108_gr_acr_bld_write
[all...] |
| /src/sys/lib/libsa/ |
| loadfile.c | 136 } hdr; local in function:fdloadfile
143 nr = read(fd, &hdr, sizeof(hdr));
148 if (nr != sizeof(hdr)) {
155 if (!ECOFF_BADMAG(&hdr.coff)) {
156 rval = loadfile_coff(fd, &hdr.coff, marks, flags);
160 if (memcmp(hdr.elf32.e_ident, ELFMAG, SELFMAG) == 0 &&
161 hdr.elf32.e_ident[EI_CLASS] == ELFCLASS32) {
163 netbsd_elf_data = hdr.elf32.e_ident[EI_DATA];
164 rval = loadfile_elf32(fd, &hdr.elf32, marks, flags)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| cstep.h | 7 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz);
14 u32 nvbios_cstepEe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
15 u32 nvbios_cstepEp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
17 u32 nvbios_cstepEm(struct nvkm_bios *, u8 pstate, u8 *ver, u8 *hdr,
26 u32 nvbios_cstepXe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
27 u32 nvbios_cstepXp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
|
| M0209.h | 7 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
19 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
21 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_M0209E *);
27 u32 nvbios_M0209Se(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr);
28 u32 nvbios_M0209Sp(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr,
|
| P0260.h | 7 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz);
13 u32 nvbios_P0260Ee(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
14 u32 nvbios_P0260Ep(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
21 u32 nvbios_P0260Xe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
22 u32 nvbios_P0260Xp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
|
| disp.h | 7 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *sub);
13 u16 nvbios_disp_entry(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub);
14 u16 nvbios_disp_parse(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub,
24 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
26 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
28 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
37 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
39 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
41 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
|
| timing.h | 9 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
11 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
13 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
|
| /src/usr.sbin/fstyp/ |
| hfsplus.c | 104 struct hfsp_vol_hdr *hdr; local in function:fstyp_hfsp
108 hdr = read_buf(fp, VOL_HDR_OFF, sizeof(*hdr));
109 if (hdr == NULL)
112 if ((strncmp(hdr->hp_signature, "H+", 2) != 0 || hdr->hp_version != 4)
114 (strncmp(hdr->hp_signature, "HX", 2) != 0 || hdr->hp_version != 5))
123 free(hdr);
|
| /src/sys/net/npf/ |
| npf_ext_log.c | 89 struct npfloghdr hdr; local in function:npf_log
91 memset(&hdr, 0, sizeof(hdr));
94 hdr.af = AF_INET;
96 hdr.af = AF_INET6;
98 hdr.af = AF_UNSPEC;
101 hdr.length = NPFLOG_REAL_HDRLEN;
102 hdr.action = *decision == NPF_DECISION_PASS ?
104 hdr.reason = 0; /* match */
108 hdr.ifname, sizeof(hdr.ifname))
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pmu/ |
| nouveau_nvkm_subdev_pmu_gm20b.c | 36 gm20b_pmu_acr_bootstrap_falcon_cb(void *priv, struct nv_falcon_msg *hdr)
39 container_of(hdr, typeof(*msg), msg.hdr);
49 .cmd.hdr.unit_id = NV_PMU_UNIT_ACR,
50 .cmd.hdr.size = sizeof(cmd),
57 ret = nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr,
83 struct loader_config hdr; local in function:gm20b_pmu_acr_bld_patch
86 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr));
87 addr = ((u64)hdr.code_dma_base1 << 40 | hdr.code_dma_base << 8)
108 const struct loader_config hdr = { local in function:gm20b_pmu_acr_bld_write
[all...] |
| /src/sys/dev/cardbus/ |
| cardbus_exrom.c | 161 unsigned char hdr[16];
163 bus_space_read_region_1(tag, handle, dataptr, hdr, sizeof(hdr));
164 memcpy(header->signature, hdr + PCI_EXROM_DATA_SIGNATURE, 4);
166 header->id = LEINT16(hdr, PCI_EXROM_DATA_VENDOR_ID) |
167 (LEINT16(hdr, PCI_EXROM_DATA_DEVICE_ID) << 16);
168 header->structure_length = LEINT16(hdr, PCI_EXROM_DATA_LENGTH);
169 header->structure_rev = hdr[PCI_EXROM_DATA_REV];
170 header->class = (hdr[PCI_EXROM_DATA_CLASS_CODE] << 8) |
171 (hdr[PCI_EXROM_DATA_CLASS_CODE + 1] << 16)
[all...] |
| /src/lib/libc/db/hash/ |
| hash.h | 95 HASHHDR hdr; /* Header */ member in struct:htab
281 #define BSIZE hdr.bsize
282 #define BSHIFT hdr.bshift
283 #define DSIZE hdr.dsize
284 #define SGSIZE hdr.ssize
285 #define SSHIFT hdr.sshift
286 #define LORDER hdr.lorder
287 #define OVFL_POINT hdr.ovfl_point
288 #define LAST_FREED hdr.last_freed
289 #define MAX_BUCKET hdr.max_bucke
[all...] |
| /src/usr.bin/mkubootimage/ |
| mkubootimage.c | 277 dump_header_uimg(struct uboot_image_header *hdr)
279 time_t tm = be32toh(hdr->ih_time);
281 printf(" magic: 0x%08x\n", be32toh(hdr->ih_magic));
283 printf(" size: %u\n", be32toh(hdr->ih_size));
284 printf(" load addr: 0x%08x\n", be32toh(hdr->ih_load));
285 printf(" entry point: 0x%08x\n", be32toh(hdr->ih_ep));
286 printf(" data crc: 0x%08x\n", be32toh(hdr->ih_dcrc));
287 printf(" os: %d (%s)\n", hdr->ih_os,
288 get_os_name(hdr->ih_os));
289 printf(" arch: %d (%s)\n", hdr->ih_arch
[all...] |
| /src/sbin/gpt/ |
| header.c | 72 struct gpt_hdr *hdr; local in function:header
89 hdr = map->map_data;
90 revision = le32toh(hdr->hdr_revision);
93 gpt_show_num("- First Data Sector", le64toh(hdr->hdr_lba_start));
94 gpt_show_num("- Last Data Sector", le64toh(hdr->hdr_lba_end));
95 gpt_uuid_snprintf(buf, sizeof(buf), "%d", hdr->hdr_guid);
97 printf("- Number of GPT Entries: %u\n", le32toh(hdr->hdr_entries));
|
| /src/sys/dev/pci/ |
| viogpu.h | 153 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_update_cursor
172 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_unref
179 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_create_2d
188 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_set_scanout
196 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_flush
204 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_transfer_to_host_2d
219 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_attach_backing
226 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_detach_backing
234 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resp_display_info
251 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_transfer_host_3d
263 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_create_3d
280 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_ctx_create
288 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_ctx_destroy
293 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_ctx_resource
300 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_cmd_submit
310 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_get_capset_info
317 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resp_capset_info
326 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_get_capset
333 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resp_capset
339 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_cmd_get_edid
346 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resp_edid
377 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_assign_uuid
384 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resp_resource_uuid
390 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_create_blob
412 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_set_scanout_blob
426 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_map_blob
439 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resp_map_info
446 struct virtio_gpu_ctrl_hdr hdr; member in struct:virtio_gpu_resource_unmap_blob
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/sec2/ |
| nouveau_nvkm_engine_sec2_gp102.c | 37 gp102_sec2_acr_bootstrap_falcon_callback(void *priv, struct nv_falcon_msg *hdr)
40 container_of(hdr, typeof(*msg), msg.hdr);
61 .cmd.hdr.unit_id = sec2->func->unit_acr,
62 .cmd.hdr.size = sizeof(cmd),
68 return nvkm_falcon_cmdq_send(sec2->cmdq, &cmd.cmd.hdr,
87 struct loader_config_v1 hdr; local in function:gp102_sec2_acr_bld_patch
88 nvkm_robj(acr->wpr, bld, &hdr, sizeof(hdr));
89 hdr.code_dma_base = hdr.code_dma_base + adjust
100 const struct loader_config_v1 hdr = { local in function:gp102_sec2_acr_bld_write
268 struct flcn_bl_dmem_desc_v2 hdr; local in function:gp102_sec2_acr_bld_patch_1
280 const struct flcn_bl_dmem_desc_v2 hdr = { local in function:gp102_sec2_acr_bld_write_1
[all...] |
