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    Searched refs:AArch64CC (Results 1 - 17 of 17) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64GlobalISelUtils.cpp 99 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode,
100 AArch64CC::CondCode &CondCode2) {
101 CondCode2 = AArch64CC::AL;
106 CondCode = AArch64CC::EQ;
109 CondCode = AArch64CC::GT;
112 CondCode = AArch64CC::GE;
115 CondCode = AArch64CC::MI;
118 CondCode = AArch64CC::LS;
121 CondCode = AArch64CC::MI;
122 CondCode2 = AArch64CC::GT
    [all...]
AArch64GlobalISelUtils.h 61 /// AArch64CC::AL otherwise.
63 AArch64CC::CondCode &CondCode,
64 AArch64CC::CondCode &CondCode2);
71 /// AArch64CC::AL otherwise.
74 AArch64CC::CondCode &CondCode,
75 AArch64CC::CondCode &CondCode2,
AArch64PostLegalizerLowering.cpp 856 getVectorFCMP(AArch64CC::CondCode CC, Register LHS, Register RHS, bool IsZero,
864 case AArch64CC::NE:
871 case AArch64CC::EQ:
878 case AArch64CC::GE:
885 case AArch64CC::GT:
892 case AArch64CC::LS:
899 case AArch64CC::MI:
931 AArch64CC::CondCode CC, CC2;
939 if (CC2 == AArch64CC::AL)
AArch64InstructionSelector.cpp 260 AArch64CC::CondCode CC,
283 std::pair<MachineInstr *, AArch64CC::CondCode>
1043 Register False, AArch64CC::CondCode CC,
1084 CC = AArch64CC::getInvertedCondCode(CC);
1101 CC = AArch64CC::getInvertedCondCode(CC);
1120 CC = AArch64CC::getInvertedCondCode(CC);
1171 CC = AArch64CC::getInvertedCondCode(CC);
1180 CC = AArch64CC::getInvertedCondCode(CC);
1212 static AArch64CC::CondCode changeICMPPredToAArch64CC(CmpInst::Predicate P) {
1217 return AArch64CC::NE
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ConditionOptimizer.cpp 102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
230 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) {
232 case AArch64CC::GT: return AArch64CC::GE;
233 case AArch64CC::GE: return AArch64CC::GT;
234 case AArch64CC::LT: return AArch64CC::LE
    [all...]
AArch64ConditionalCompares.cpp 164 AArch64CC::CondCode HeadCmpBBCC;
170 AArch64CC::CondCode CmpBBTailCC;
273 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) {
277 CC = (AArch64CC::CondCode)(int)Cond[0].getImm();
289 CC = AArch64CC::EQ;
294 CC = AArch64CC::NE;
526 HeadCmpBBCC = AArch64CC::getInvertedCondCode(HeadCmpBBCC);
551 CmpBBTailCC = AArch64CC::getInvertedCondCode(CmpBBTailCC);
554 << AArch64CC::getCondCodeName(HeadCmpBBCC)
556 << AArch64CC::getCondCodeName(CmpBBTailCC) << '\n')
    [all...]
AArch64RedundantCopyElimination.cpp 145 AArch64CC::CondCode CC = (AArch64CC::CondCode)CondBr.getOperand(0).getImm();
146 if (CC != AArch64CC::EQ && CC != AArch64CC::NE)
150 if ((CC == AArch64CC::EQ && BrTarget != MBB) ||
151 (CC == AArch64CC::NE && BrTarget == MBB))
AArch64CondBrTuning.cpp 114 AArch64CC::CondCode CC;
122 CC = AArch64CC::EQ;
126 CC = AArch64CC::NE;
130 CC = AArch64CC::PL;
134 CC = AArch64CC::MI;
AArch64SpeculationHardening.cpp 154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const {
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm());
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode,
247 AArch64CC::CondCode CondCode;
256 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode);
379 .addImm(AArch64CC::EQ);
AArch64FastISel.cpp 194 bool foldXALUIntrinsic(AArch64CC::CondCode &CC, const Instruction *I,
2193 static AArch64CC::CondCode getCompareCC(CmpInst::Predicate Pred) {
2199 return AArch64CC::AL;
2202 return AArch64CC::EQ;
2205 return AArch64CC::GT;
2208 return AArch64CC::GE;
2211 return AArch64CC::HI;
2213 return AArch64CC::MI;
2216 return AArch64CC::LS;
2218 return AArch64CC::VC
    [all...]
AArch64ISelLowering.cpp 2223 static AArch64CC::CondCode changeIntCCToAArch64CC(ISD::CondCode CC) {
2228 return AArch64CC::NE;
2230 return AArch64CC::EQ;
2232 return AArch64CC::GT;
2234 return AArch64CC::GE;
2236 return AArch64CC::LT;
2238 return AArch64CC::LE;
2240 return AArch64CC::HI;
2242 return AArch64CC::HS;
2244 return AArch64CC::LO
    [all...]
AArch64InstrInfo.cpp 414 AArch64CC::CondCode CC = (AArch64CC::CondCode)(int)Cond[0].getImm();
415 Cond[0].setImm(AArch64CC::getInvertedCondCode(CC));
668 AArch64CC::CondCode CC;
673 CC = AArch64CC::CondCode(Cond[0].getImm());
683 CC = AArch64CC::EQ;
687 CC = AArch64CC::EQ;
691 CC = AArch64CC::NE;
695 CC = AArch64CC::NE;
722 CC = AArch64CC::EQ
    [all...]
AArch64AsmPrinter.cpp 411 .addImm(AArch64CC::NE)
436 .addImm(AArch64CC::EQ)
451 .addImm(AArch64CC::HI)
476 .addImm(AArch64CC::LS)
500 .addImm(AArch64CC::EQ)
AArch64ExpandPseudoInsts.cpp 224 .addImm(AArch64CC::NE)
307 .addImm(AArch64CC::EQ);
315 .addImm(AArch64CC::EQ);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp 155 AArch64CC::CondCode parseCondCodeString(StringRef Cond);
395 AArch64CC::CondCode Code;
548 AArch64CC::CondCode getCondCode() const {
1960 CreateCondCode(AArch64CC::CondCode Code, SMLoc S, SMLoc E, MCContext &Ctx) {
2747 AArch64CC::CondCode AArch64AsmParser::parseCondCodeString(StringRef Cond) {
2748 AArch64CC::CondCode CC = StringSwitch<AArch64CC::CondCode>(Cond.lower())
2749 .Case("eq", AArch64CC::EQ)
2750 .Case("ne", AArch64CC::NE)
2751 .Case("cs", AArch64CC::HS
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64InstPrinter.cpp 1074 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm();
1075 O << AArch64CC::getCondCodeName(CC);
1081 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm();
1082 O << AArch64CC::getCondCodeName(AArch64CC::getInvertedCondCode(CC));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Utils/
AArch64BaseInfo.h 231 namespace AArch64CC {
315 } // end namespace AArch64CC

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