1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2025, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 64 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 65 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 66 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 67 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 68 #define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */ 69 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 70 #define ACPI_SIG_IOVT "IOVT" /* I/O Virtualization Table */ 71 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 72 #define ACPI_SIG_KEYP "KEYP" /* Key Programming Interface for IDE */ 73 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 74 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 75 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 76 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 77 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 78 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 79 #define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */ 80 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 81 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 82 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 83 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 84 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 85 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 86 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 87 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 88 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 89 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 90 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 91 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 92 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 93 #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */ 94 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 95 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 96 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 97 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 98 #define ACPI_SIG_SWFT "SWFT" /* SoundWire File Table */ 99 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 100 101 102 /* 103 * All tables must be byte-packed to match the ACPI specification, since 104 * the tables are provided by the system BIOS. 105 */ 106 #pragma pack(1) 107 108 /* 109 * Note: C bitfields are not used for this reason: 110 * 111 * "Bitfields are great and easy to read, but unfortunately the C language 112 * does not specify the layout of bitfields in memory, which means they are 113 * essentially useless for dealing with packed data in on-disk formats or 114 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 115 * this decision was a design error in C. Ritchie could have picked an order 116 * and stuck with it." Norman Ramsey. 117 * See http://stackoverflow.com/a/1053662/41661 118 */ 119 120 121 /******************************************************************************* 122 * 123 * AEST - Arm Error Source Table 124 * 125 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 126 * September 2020. 127 * 128 ******************************************************************************/ 129 130 typedef struct acpi_table_aest 131 { 132 ACPI_TABLE_HEADER Header; 133 134 } ACPI_TABLE_AEST; 135 136 /* Common Subtable header - one per Node Structure (Subtable) */ 137 138 typedef struct acpi_aest_hdr 139 { 140 UINT8 Type; 141 UINT16 Length; 142 UINT8 Reserved; 143 UINT32 NodeSpecificOffset; 144 UINT32 NodeInterfaceOffset; 145 UINT32 NodeInterruptOffset; 146 UINT32 NodeInterruptCount; 147 UINT64 TimestampRate; 148 UINT64 Reserved1; 149 UINT64 ErrorInjectionRate; 150 151 } ACPI_AEST_HEADER; 152 153 /* Values for Type above */ 154 155 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 156 #define ACPI_AEST_MEMORY_ERROR_NODE 1 157 #define ACPI_AEST_SMMU_ERROR_NODE 2 158 #define ACPI_AEST_VENDOR_ERROR_NODE 3 159 #define ACPI_AEST_GIC_ERROR_NODE 4 160 #define ACPI_AEST_PCIE_ERROR_NODE 5 161 #define ACPI_AEST_PROXY_ERROR_NODE 6 162 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 163 164 165 /* 166 * AEST subtables (Error nodes) 167 */ 168 169 /* 0: Processor Error */ 170 171 typedef struct acpi_aest_processor 172 { 173 UINT32 ProcessorId; 174 UINT8 ResourceType; 175 UINT8 Reserved; 176 UINT8 Flags; 177 UINT8 Revision; 178 UINT64 ProcessorAffinity; 179 180 } ACPI_AEST_PROCESSOR; 181 182 /* Values for ResourceType above, related structs below */ 183 184 #define ACPI_AEST_CACHE_RESOURCE 0 185 #define ACPI_AEST_TLB_RESOURCE 1 186 #define ACPI_AEST_GENERIC_RESOURCE 2 187 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 188 189 /* 0R: Processor Cache Resource Substructure */ 190 191 typedef struct acpi_aest_processor_cache 192 { 193 UINT32 CacheReference; 194 UINT32 Reserved; 195 196 } ACPI_AEST_PROCESSOR_CACHE; 197 198 /* Values for CacheType above */ 199 200 #define ACPI_AEST_CACHE_DATA 0 201 #define ACPI_AEST_CACHE_INSTRUCTION 1 202 #define ACPI_AEST_CACHE_UNIFIED 2 203 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 204 205 /* 1R: Processor TLB Resource Substructure */ 206 207 typedef struct acpi_aest_processor_tlb 208 { 209 UINT32 TlbLevel; 210 UINT32 Reserved; 211 212 } ACPI_AEST_PROCESSOR_TLB; 213 214 /* 2R: Processor Generic Resource Substructure */ 215 216 typedef struct acpi_aest_processor_generic 217 { 218 UINT32 Resource; 219 220 } ACPI_AEST_PROCESSOR_GENERIC; 221 222 /* 1: Memory Error */ 223 224 typedef struct acpi_aest_memory 225 { 226 UINT32 SratProximityDomain; 227 228 } ACPI_AEST_MEMORY; 229 230 /* 2: Smmu Error */ 231 232 typedef struct acpi_aest_smmu 233 { 234 UINT32 IortNodeReference; 235 UINT32 SubcomponentReference; 236 237 } ACPI_AEST_SMMU; 238 239 /* 3: Vendor Defined */ 240 241 typedef struct acpi_aest_vendor 242 { 243 UINT32 AcpiHid; 244 UINT32 AcpiUid; 245 UINT8 VendorSpecificData[16]; 246 247 } ACPI_AEST_VENDOR; 248 249 /* 3: Vendor Defined V2 */ 250 251 typedef struct acpi_aest_vendor_v2 252 { 253 UINT64 AcpiHid; 254 UINT32 AcpiUid; 255 UINT8 VendorSpecificData[16]; 256 257 } ACPI_AEST_VENDOR_V2; 258 259 /* 4: Gic Error */ 260 261 typedef struct acpi_aest_gic 262 { 263 UINT32 InterfaceType; 264 UINT32 InstanceId; 265 266 } ACPI_AEST_GIC; 267 268 /* Values for InterfaceType above */ 269 270 #define ACPI_AEST_GIC_CPU 0 271 #define ACPI_AEST_GIC_DISTRIBUTOR 1 272 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 273 #define ACPI_AEST_GIC_ITS 3 274 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 275 276 /* 5: PCIe Error */ 277 278 typedef struct acpi_aest_pcie 279 { 280 UINT32 IortNodeReference; 281 282 } ACPI_AEST_PCIE; 283 284 285 /* 6: Proxy Error */ 286 287 typedef struct acpi_aest_proxy 288 { 289 UINT64 NodeAddress; 290 291 } ACPI_AEST_PROXY; 292 293 /* Node Interface Structure */ 294 295 typedef struct acpi_aest_node_interface 296 { 297 UINT8 Type; 298 UINT8 Reserved[3]; 299 UINT32 Flags; 300 UINT64 Address; 301 UINT32 ErrorRecordIndex; 302 UINT32 ErrorRecordCount; 303 UINT64 ErrorRecordImplemented; 304 UINT64 ErrorStatusReporting; 305 UINT64 AddressingMode; 306 307 } ACPI_AEST_NODE_INTERFACE; 308 309 /* Node Interface Structure V2*/ 310 311 typedef struct acpi_aest_node_interface_header 312 { 313 UINT8 Type; 314 UINT8 GroupFormat; 315 UINT8 Reserved[2]; 316 UINT32 Flags; 317 UINT64 Address; 318 UINT32 ErrorRecordIndex; 319 UINT32 ErrorRecordCount; 320 321 } ACPI_AEST_NODE_INTERFACE_HEADER; 322 323 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 324 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 325 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 326 327 typedef struct acpi_aest_node_interface_common 328 { 329 UINT32 ErrorNodeDevice; 330 UINT32 ProcessorAffinity; 331 UINT64 ErrorGroupRegisterBase; 332 UINT64 FaultInjectRegisterBase; 333 UINT64 InterruptConfigRegisterBase; 334 335 } ACPI_AEST_NODE_INTERFACE_COMMON; 336 337 typedef struct acpi_aest_node_interface_4k 338 { 339 UINT64 ErrorRecordImplemented; 340 UINT64 ErrorStatusReporting; 341 UINT64 AddressingMode; 342 ACPI_AEST_NODE_INTERFACE_COMMON Common; 343 344 } ACPI_AEST_NODE_INTERFACE_4K; 345 346 typedef struct acpi_aest_node_interface_16k 347 { 348 UINT64 ErrorRecordImplemented[4]; 349 UINT64 ErrorStatusReporting[4]; 350 UINT64 AddressingMode[4]; 351 ACPI_AEST_NODE_INTERFACE_COMMON Common; 352 353 } ACPI_AEST_NODE_INTERFACE_16K; 354 355 typedef struct acpi_aest_node_interface_64k 356 { 357 INT64 ErrorRecordImplemented[14]; 358 UINT64 ErrorStatusReporting[14]; 359 UINT64 AddressingMode[14]; 360 ACPI_AEST_NODE_INTERFACE_COMMON Common; 361 362 } ACPI_AEST_NODE_INTERFACE_64K; 363 364 /* Values for Type field above */ 365 366 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 367 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 368 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 369 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 370 371 /* Node Interrupt Structure */ 372 373 typedef struct acpi_aest_node_interrupt 374 { 375 UINT8 Type; 376 UINT8 Reserved[2]; 377 UINT8 Flags; 378 UINT32 Gsiv; 379 UINT8 IortId; 380 UINT8 Reserved1[3]; 381 382 } ACPI_AEST_NODE_INTERRUPT; 383 384 /* Node Interrupt Structure V2 */ 385 386 typedef struct acpi_aest_node_interrupt_v2 387 { 388 UINT8 Type; 389 UINT8 Reserved[2]; 390 UINT8 Flags; 391 UINT32 Gsiv; 392 UINT8 Reserved1[4]; 393 394 } ACPI_AEST_NODE_INTERRUPT_V2; 395 396 /* Values for Type field above */ 397 398 #define ACPI_AEST_NODE_FAULT_HANDLING 0 399 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 400 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 401 402 403 /******************************************************************************* 404 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 405 * 406 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 407 * ARM DEN0093 v1.1 408 * 409 ******************************************************************************/ 410 typedef struct acpi_table_agdi 411 { 412 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 413 UINT8 Flags; 414 UINT8 Reserved[3]; 415 UINT32 SdeiEvent; 416 UINT32 Gsiv; 417 418 } ACPI_TABLE_AGDI; 419 420 /* Mask for Flags field above */ 421 422 #define ACPI_AGDI_SIGNALING_MODE (1) 423 424 425 /******************************************************************************* 426 * 427 * APMT - ARM Performance Monitoring Unit Table 428 * 429 * Conforms to: 430 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 431 * ARM DEN0117 v1.0 November 25, 2021 432 * 433 ******************************************************************************/ 434 435 typedef struct acpi_table_apmt { 436 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 437 } ACPI_TABLE_APMT; 438 439 #define ACPI_APMT_NODE_ID_LENGTH 4 440 441 /* 442 * APMT subtables 443 */ 444 typedef struct acpi_apmt_node { 445 UINT16 Length; 446 UINT8 Flags; 447 UINT8 Type; 448 UINT32 Id; 449 UINT64 InstPrimary; 450 UINT32 InstSecondary; 451 UINT64 BaseAddress0; 452 UINT64 BaseAddress1; 453 UINT32 OvflwIrq; 454 UINT32 Reserved; 455 UINT32 OvflwIrqFlags; 456 UINT32 ProcAffinity; 457 UINT32 ImplId; 458 } ACPI_APMT_NODE; 459 460 /* Masks for Flags field above */ 461 462 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 463 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 464 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 465 466 /* Values for Flags dual page field above */ 467 468 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 469 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 470 471 /* Values for Flags processor affinity field above */ 472 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 473 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 474 475 /* Values for Flags 64-bit atomic field above */ 476 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 477 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 478 479 /* Values for Type field above */ 480 481 enum acpi_apmt_node_type { 482 ACPI_APMT_NODE_TYPE_MC = 0x00, 483 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 484 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 485 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 486 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 487 ACPI_APMT_NODE_TYPE_COUNT 488 }; 489 490 /* Masks for ovflw_irq_flags field above */ 491 492 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 493 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 494 495 /* Values for ovflw_irq_flags mode field above */ 496 497 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 498 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 499 500 /* Values for ovflw_irq_flags type field above */ 501 502 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 503 504 505 /******************************************************************************* 506 * 507 * BDAT - BIOS Data ACPI Table 508 * 509 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 510 * Nov 2020 511 * 512 ******************************************************************************/ 513 514 typedef struct acpi_table_bdat 515 { 516 ACPI_TABLE_HEADER Header; 517 ACPI_GENERIC_ADDRESS Gas; 518 519 } ACPI_TABLE_BDAT; 520 521 /******************************************************************************* 522 * 523 * CCEL - CC-Event Log 524 * From: "Guest-Host-Communication Interface (GHCI) for Intel 525 * Trust Domain Extensions (Intel TDX)". Feb 2022 526 * 527 ******************************************************************************/ 528 529 typedef struct acpi_table_ccel 530 { 531 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 532 UINT8 CCType; 533 UINT8 CCSubType; 534 UINT16 Reserved; 535 UINT64 LogAreaMinimumLength; 536 UINT64 LogAreaStartAddress; 537 538 } ACPI_TABLE_CCEL; 539 540 /******************************************************************************* 541 * 542 * ERDT - Enhanced Resource Director Technology (ERDT) table 543 * 544 * Conforms to "Intel Resource Director Technology Architecture Specification" 545 * Version 1.1, January 2025 546 * 547 ******************************************************************************/ 548 549 typedef struct acpi_table_erdt 550 { 551 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 552 UINT32 MaxClos; /* Maximum classes of service */ 553 UINT8 Reserved[24]; 554 UINT8 Erdt_Substructures[]; 555 556 } ACPI_TABLE_ERDT; 557 558 559 /* Values for subtable type in ACPI_SUBTBL_HDR_16 */ 560 561 enum AcpiErdtType 562 { 563 ACPI_ERDT_TYPE_RMDD = 0, 564 ACPI_ERDT_TYPE_CACD = 1, 565 ACPI_ERDT_TYPE_DACD = 2, 566 ACPI_ERDT_TYPE_CMRC = 3, 567 ACPI_ERDT_TYPE_MMRC = 4, 568 ACPI_ERDT_TYPE_MARC = 5, 569 ACPI_ERDT_TYPE_CARC = 6, 570 ACPI_ERDT_TYPE_CMRD = 7, 571 ACPI_ERDT_TYPE_IBRD = 8, 572 ACPI_ERDT_TYPE_IBAD = 9, 573 ACPI_ERDT_TYPE_CARD = 10, 574 ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */ 575 576 }; 577 578 /* 579 * ERDT Subtables, correspond to Type in ACPI_SUBTBL_HDR_16 580 */ 581 582 /* 0: RMDD - Resource Management Domain Description */ 583 584 typedef struct acpi_erdt_rmdd 585 { 586 ACPI_SUBTBL_HDR_16 Header; 587 UINT16 Flags; 588 UINT16 IO_l3_Slices; /* Number of slices in IO cache */ 589 UINT8 IO_l3_Sets; /* Number of sets in IO cache */ 590 UINT8 IO_l3_Ways; /* Number of ways in IO cache */ 591 UINT64 Reserved; 592 UINT16 DomainId; /* Unique domain ID */ 593 UINT32 MaxRmid; /* Maximun RMID supported */ 594 UINT64 CregBase; /* Control Register Base Address */ 595 UINT16 CregSize; /* Control Register Size (4K pages) */ 596 UINT8 RmddStructs[]; 597 598 } ACPI_ERDT_RMDD; 599 600 601 /* 1: CACD - CPU Agent Collection Description */ 602 603 typedef struct acpi_erdt_cacd 604 { 605 ACPI_SUBTBL_HDR_16 Header; 606 UINT16 Reserved; 607 UINT16 DomainId; /* Unique domain ID */ 608 UINT32 X2APICIDS[]; 609 610 } ACPI_ERDT_CACD; 611 612 613 /* 2: DACD - Device Agent Collection Description */ 614 615 typedef struct acpi_erdt_dacd 616 { 617 ACPI_SUBTBL_HDR_16 Header; 618 UINT16 Reserved; 619 UINT16 DomainId; /* Unique domain ID */ 620 UINT8 DevPaths[]; 621 622 } ACPI_ERDT_DACD; 623 624 typedef struct acpi_erdt_dacd_dev_paths 625 { 626 ACPI_SUBTABLE_HEADER Header; 627 UINT16 Segment; 628 UINT8 Reserved; 629 UINT8 StartBus; 630 UINT8 Path[]; 631 632 } ACPI_ERDT_DACD_PATHS; 633 634 635 /* 3: CMRC - Cache Monitoring Registers for CPU Agents */ 636 637 typedef struct acpi_erdt_cmrc 638 { 639 ACPI_SUBTBL_HDR_16 Header; 640 UINT32 Reserved1; 641 UINT32 Flags; 642 UINT8 IndexFn; 643 UINT8 Reserved2[11]; 644 UINT64 CmtRegBase; 645 UINT32 CmtRegSize; 646 UINT16 ClumpSize; 647 UINT16 ClumpStride; 648 UINT64 UpScale; 649 650 } ACPI_ERDT_CMRC; 651 652 653 /* 4: MMRC - Memory-bandwidth Monitoring Registers for CPU Agents */ 654 655 typedef struct acpi_erdt_mmrc 656 { 657 ACPI_SUBTBL_HDR_16 Header; 658 UINT32 Reserved1; 659 UINT32 Flags; 660 UINT8 IndexFn; 661 UINT8 Reserved2[11]; 662 UINT64 RegBase; 663 UINT32 RegSize; 664 UINT8 CounterWidth; 665 UINT64 UpScale; 666 UINT8 Reserved3[7]; 667 UINT32 CorrFactorListLen; 668 UINT32 CorrFactorList[]; 669 670 } ACPI_ERDT_MMRC; 671 672 673 /* 5: MARC - Memory-bandwidth Allocation Registers for CPU Agents */ 674 675 typedef struct acpi_erdt_marc 676 { 677 ACPI_SUBTBL_HDR_16 Header; 678 UINT16 Reserved1; 679 UINT16 Flags; 680 UINT8 IndexFn; 681 UINT8 Reserved2[7]; 682 UINT64 RegBaseOpt; 683 UINT64 RegBaseMin; 684 UINT64 RegBaseMax; 685 UINT32 MbaRegSize; 686 UINT32 MbaCtrlRange; 687 688 } ACPI_ERDT_MARC; 689 690 691 /* 6: CARC - Cache Allocation Registers for CPU Agents */ 692 693 typedef struct acpi_erdt_carc 694 { 695 ACPI_SUBTBL_HDR_16 Header; 696 697 } ACPI_ERDT_CARC; 698 699 700 /* 7: CMRD - Cache Monitoring Registers for Device Agents */ 701 702 typedef struct acpi_erdt_cmrd 703 { 704 ACPI_SUBTBL_HDR_16 Header; 705 UINT32 Reserved1; 706 UINT32 Flags; 707 UINT8 IndexFn; 708 UINT8 Reserved2[11]; 709 UINT64 RegBase; 710 UINT32 RegSize; 711 UINT16 CmtRegOff; 712 UINT16 CmtClumpSize; 713 UINT64 UpScale; 714 715 } ACPI_ERDT_CMRD; 716 717 718 /* 8: IBRD - Cache Monitoring Registers for Device Agents */ 719 720 typedef struct acpi_erdt_ibrd 721 { 722 ACPI_SUBTBL_HDR_16 Header; 723 UINT32 Reserved1; 724 UINT32 Flags; 725 UINT8 IndexFn; 726 UINT8 Reserved2[11]; 727 UINT64 RegBase; 728 UINT32 RegSize; 729 UINT16 TotalBwOffset; 730 UINT16 IOMissBwOffset; 731 UINT16 TotalBwClump; 732 UINT16 IOMissBwClump; 733 UINT8 Reserved3[7]; 734 UINT8 CounterWidth; 735 UINT64 UpScale; 736 UINT32 CorrFactorListLen; 737 UINT32 CorrFactorList[]; 738 739 } ACPI_ERDT_IBRD; 740 741 742 /* 9: IBAD - IO bandwidth Allocation Registers for device agents */ 743 744 typedef struct acpi_erdt_ibad 745 { 746 ACPI_SUBTBL_HDR_16 Header; 747 748 } ACPI_ERDT_IBAD; 749 750 751 /* 10: CARD - IO bandwidth Allocation Registers for Device Agents */ 752 753 typedef struct acpi_erdt_card 754 { 755 ACPI_SUBTBL_HDR_16 Header; 756 UINT32 Reserved1; 757 UINT32 Flags; 758 UINT32 ContentionMask; 759 UINT8 IndexFn; 760 UINT8 Reserved2[7]; 761 UINT64 RegBase; 762 UINT32 RegSize; 763 UINT16 CatRegOffset; 764 UINT16 CatRegBlockSize; 765 766 } ACPI_ERDT_CARD; 767 768 769 /******************************************************************************* 770 * 771 * IORT - IO Remapping Table 772 * 773 * Conforms to "IO Remapping Table System Software on ARM Platforms", 774 * Document number: ARM DEN 0049E.f, Apr 2024 775 * 776 ******************************************************************************/ 777 778 typedef struct acpi_table_iort 779 { 780 ACPI_TABLE_HEADER Header; 781 UINT32 NodeCount; 782 UINT32 NodeOffset; 783 UINT32 Reserved; 784 785 } ACPI_TABLE_IORT; 786 787 788 /* 789 * IORT subtables 790 */ 791 typedef struct acpi_iort_node 792 { 793 UINT8 Type; 794 UINT16 Length; 795 UINT8 Revision; 796 UINT32 Identifier; 797 UINT32 MappingCount; 798 UINT32 MappingOffset; 799 char NodeData[]; 800 801 } ACPI_IORT_NODE; 802 803 /* Values for subtable Type above */ 804 805 enum AcpiIortNodeType 806 { 807 ACPI_IORT_NODE_ITS_GROUP = 0x00, 808 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 809 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 810 ACPI_IORT_NODE_SMMU = 0x03, 811 ACPI_IORT_NODE_SMMU_V3 = 0x04, 812 ACPI_IORT_NODE_PMCG = 0x05, 813 ACPI_IORT_NODE_RMR = 0x06, 814 ACPI_IORT_NODE_IWB = 0x07, 815 }; 816 817 818 typedef struct acpi_iort_id_mapping 819 { 820 UINT32 InputBase; /* Lowest value in input range */ 821 UINT32 IdCount; /* Number of IDs */ 822 UINT32 OutputBase; /* Lowest value in output range */ 823 UINT32 OutputReference; /* A reference to the output node */ 824 UINT32 Flags; 825 826 } ACPI_IORT_ID_MAPPING; 827 828 /* Masks for Flags field above for IORT subtable */ 829 830 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 831 832 833 typedef struct acpi_iort_memory_access 834 { 835 UINT32 CacheCoherency; 836 UINT8 Hints; 837 UINT16 Reserved; 838 UINT8 MemoryFlags; 839 840 } ACPI_IORT_MEMORY_ACCESS; 841 842 /* Values for CacheCoherency field above */ 843 844 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 845 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 846 847 /* Masks for Hints field above */ 848 849 #define ACPI_IORT_HT_TRANSIENT (1) 850 #define ACPI_IORT_HT_WRITE (1<<1) 851 #define ACPI_IORT_HT_READ (1<<2) 852 #define ACPI_IORT_HT_OVERRIDE (1<<3) 853 854 /* Masks for MemoryFlags field above */ 855 856 #define ACPI_IORT_MF_COHERENCY (1) 857 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 858 #define ACPI_IORT_MF_CANWBS (1<<2) 859 860 861 /* 862 * IORT node specific subtables 863 */ 864 typedef struct acpi_iort_its_group 865 { 866 UINT32 ItsCount; 867 UINT32 Identifiers[]; /* GIC ITS identifier array */ 868 869 } ACPI_IORT_ITS_GROUP; 870 871 872 typedef struct acpi_iort_named_component 873 { 874 UINT32 NodeFlags; 875 UINT64 MemoryProperties; /* Memory access properties */ 876 UINT8 MemoryAddressLimit; /* Memory address size limit */ 877 char DeviceName[]; /* Path of namespace object */ 878 879 } ACPI_IORT_NAMED_COMPONENT; 880 881 /* Masks for Flags field above */ 882 883 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 884 #define ACPI_IORT_NC_PASID_BITS (31<<1) 885 886 typedef struct acpi_iort_root_complex 887 { 888 UINT64 MemoryProperties; /* Memory access properties */ 889 UINT32 AtsAttribute; 890 UINT32 PciSegmentNumber; 891 UINT8 MemoryAddressLimit; /* Memory address size limit */ 892 UINT16 PasidCapabilities; /* PASID Capabilities */ 893 UINT8 Reserved[]; /* Reserved, must be zero */ 894 895 } ACPI_IORT_ROOT_COMPLEX; 896 897 /* Masks for AtsAttribute field above */ 898 899 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 900 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 901 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 902 903 /* Masks for PasidCapabilities field above */ 904 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 905 906 typedef struct acpi_iort_smmu 907 { 908 UINT64 BaseAddress; /* SMMU base address */ 909 UINT64 Span; /* Length of memory range */ 910 UINT32 Model; 911 UINT32 Flags; 912 UINT32 GlobalInterruptOffset; 913 UINT32 ContextInterruptCount; 914 UINT32 ContextInterruptOffset; 915 UINT32 PmuInterruptCount; 916 UINT32 PmuInterruptOffset; 917 UINT64 Interrupts[]; /* Interrupt array */ 918 919 } ACPI_IORT_SMMU; 920 921 /* Values for Model field above */ 922 923 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 924 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 925 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 926 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 927 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 928 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 929 930 /* Masks for Flags field above */ 931 932 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 933 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 934 935 /* Global interrupt format */ 936 937 typedef struct acpi_iort_smmu_gsi 938 { 939 UINT32 NSgIrpt; 940 UINT32 NSgIrptFlags; 941 UINT32 NSgCfgIrpt; 942 UINT32 NSgCfgIrptFlags; 943 944 } ACPI_IORT_SMMU_GSI; 945 946 947 typedef struct acpi_iort_smmu_v3 948 { 949 UINT64 BaseAddress; /* SMMUv3 base address */ 950 UINT32 Flags; 951 UINT32 Reserved; 952 UINT64 VatosAddress; 953 UINT32 Model; 954 UINT32 EventGsiv; 955 UINT32 PriGsiv; 956 UINT32 GerrGsiv; 957 UINT32 SyncGsiv; 958 UINT32 Pxm; 959 UINT32 IdMappingIndex; 960 961 } ACPI_IORT_SMMU_V3; 962 963 /* Values for Model field above */ 964 965 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 966 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 967 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 968 969 /* Masks for Flags field above */ 970 971 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 972 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 973 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 974 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 975 976 typedef struct acpi_iort_pmcg 977 { 978 UINT64 Page0BaseAddress; 979 UINT32 OverflowGsiv; 980 UINT32 NodeReference; 981 UINT64 Page1BaseAddress; 982 983 } ACPI_IORT_PMCG; 984 985 typedef struct acpi_iort_rmr { 986 UINT32 Flags; 987 UINT32 RmrCount; 988 UINT32 RmrOffset; 989 990 } ACPI_IORT_RMR; 991 992 /* Masks for Flags field above */ 993 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 994 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 995 996 /* 997 * Macro to access the Access Attributes in flags field above: 998 * Access Attributes is encoded in bits 9:2 999 */ 1000 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 1001 1002 /* Values for above Access Attributes */ 1003 1004 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 1005 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 1006 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 1007 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 1008 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 1009 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 1010 1011 typedef struct acpi_iort_rmr_desc { 1012 UINT64 BaseAddress; 1013 UINT64 Length; 1014 UINT32 Reserved; 1015 1016 } ACPI_IORT_RMR_DESC; 1017 1018 typedef struct acpi_iort_iwb { 1019 UINT64 BaseAddress; 1020 UINT16 IwbIndex; /* Unique IWB identifier matching with the IWB GSI namespace. */ 1021 char DeviceName[]; /* Path of the IWB namespace object */ 1022 1023 } ACPI_IORT_IWB; 1024 1025 1026 /******************************************************************************* 1027 * 1028 * IOVT - I/O Virtualization Table 1029 * 1030 * Conforms to "LoongArch I/O Virtualization Table", 1031 * Version 0.1, October 2024 1032 * 1033 ******************************************************************************/ 1034 1035 typedef struct acpi_table_iovt 1036 { 1037 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1038 UINT16 IommuCount; 1039 UINT16 IommuOffset; 1040 UINT8 Reserved[8]; 1041 1042 } ACPI_TABLE_IOVT; 1043 1044 /* IOVT subtable header */ 1045 1046 typedef struct acpi_iovt_header 1047 { 1048 UINT16 Type; 1049 UINT16 Length; 1050 1051 } ACPI_IOVT_HEADER; 1052 1053 /* Values for Type field above */ 1054 1055 enum AcpiIovtIommuType 1056 { 1057 ACPI_IOVT_IOMMU_V1 = 0x00, 1058 ACPI_IOVT_IOMMU_RESERVED = 0x01 /* 1 and greater are reserved */ 1059 }; 1060 1061 /* IOVT subtables */ 1062 1063 typedef struct acpi_iovt_iommu 1064 { 1065 ACPI_IOVT_HEADER Header; 1066 UINT32 Flags; 1067 UINT16 Segment; 1068 UINT16 PhyWidth; /* Physical Address Width */ 1069 UINT16 VirtWidth; /* Virtual Address Width */ 1070 UINT16 MaxPageLevel; 1071 UINT64 PageSize; 1072 UINT32 DeviceId; 1073 UINT64 BaseAddress; 1074 UINT32 AddressSpaceSize; 1075 UINT8 InterruptType; 1076 UINT8 Reserved[3]; 1077 UINT32 GsiNumber; 1078 UINT32 ProximityDomain; 1079 UINT32 MaxDeviceNum; 1080 UINT32 DeviceEntryNum; 1081 UINT32 DeviceEntryOffset; 1082 1083 } ACPI_IOVT_IOMMU; 1084 1085 typedef struct acpi_iovt_device_entry 1086 { 1087 UINT8 Type; 1088 UINT8 Length; 1089 UINT8 Flags; 1090 UINT8 Reserved[3]; 1091 UINT16 DeviceId; 1092 1093 } ACPI_IOVT_DEVICE_ENTRY; 1094 1095 enum AcpiIovtDeviceEntryType 1096 { 1097 ACPI_IOVT_DEVICE_ENTRY_SINGLE = 0x00, 1098 ACPI_IOVT_DEVICE_ENTRY_START = 0x01, 1099 ACPI_IOVT_DEVICE_ENTRY_END = 0x02, 1100 ACPI_IOVT_DEVICE_ENTRY_RESERVED = 0x03 /* 3 and greater are reserved */ 1101 }; 1102 1103 1104 /******************************************************************************* 1105 * 1106 * IVRS - I/O Virtualization Reporting Structure 1107 * Version 1 1108 * 1109 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 1110 * Revision 1.26, February 2009. 1111 * 1112 ******************************************************************************/ 1113 1114 typedef struct acpi_table_ivrs 1115 { 1116 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1117 UINT32 Info; /* Common virtualization info */ 1118 UINT64 Reserved; 1119 1120 } ACPI_TABLE_IVRS; 1121 1122 /* Values for Info field above */ 1123 1124 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 1125 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 1126 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 1127 1128 1129 /* IVRS subtable header */ 1130 1131 typedef struct acpi_ivrs_header 1132 { 1133 UINT8 Type; /* Subtable type */ 1134 UINT8 Flags; 1135 UINT16 Length; /* Subtable length */ 1136 UINT16 DeviceId; /* ID of IOMMU */ 1137 1138 } ACPI_IVRS_HEADER; 1139 1140 /* Values for subtable Type above */ 1141 1142 enum AcpiIvrsType 1143 { 1144 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 1145 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 1146 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 1147 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 1148 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 1149 ACPI_IVRS_TYPE_MEMORY3 = 0x22 1150 }; 1151 1152 /* Masks for Flags field above for IVHD subtable */ 1153 1154 #define ACPI_IVHD_TT_ENABLE (1) 1155 #define ACPI_IVHD_PASS_PW (1<<1) 1156 #define ACPI_IVHD_RES_PASS_PW (1<<2) 1157 #define ACPI_IVHD_ISOC (1<<3) 1158 #define ACPI_IVHD_IOTLB (1<<4) 1159 1160 /* Masks for Flags field above for IVMD subtable */ 1161 1162 #define ACPI_IVMD_UNITY (1) 1163 #define ACPI_IVMD_READ (1<<1) 1164 #define ACPI_IVMD_WRITE (1<<2) 1165 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 1166 1167 1168 /* 1169 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 1170 */ 1171 1172 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 1173 1174 typedef struct acpi_ivrs_hardware_10 1175 { 1176 ACPI_IVRS_HEADER Header; 1177 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1178 UINT64 BaseAddress; /* IOMMU control registers */ 1179 UINT16 PciSegmentGroup; 1180 UINT16 Info; /* MSI number and unit ID */ 1181 UINT32 FeatureReporting; 1182 1183 } ACPI_IVRS_HARDWARE1; 1184 1185 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 1186 1187 typedef struct acpi_ivrs_hardware_11 1188 { 1189 ACPI_IVRS_HEADER Header; 1190 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 1191 UINT64 BaseAddress; /* IOMMU control registers */ 1192 UINT16 PciSegmentGroup; 1193 UINT16 Info; /* MSI number and unit ID */ 1194 UINT32 Attributes; 1195 UINT64 EfrRegisterImage; 1196 UINT64 Reserved; 1197 } ACPI_IVRS_HARDWARE2; 1198 1199 /* Masks for Info field above */ 1200 1201 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 1202 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 1203 1204 1205 /* 1206 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 1207 * Upper two bits of the Type field are the (encoded) length of the structure. 1208 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 1209 * are reserved for future use but not defined. 1210 */ 1211 typedef struct acpi_ivrs_de_header 1212 { 1213 UINT8 Type; 1214 UINT16 Id; 1215 UINT8 DataSetting; 1216 1217 } ACPI_IVRS_DE_HEADER; 1218 1219 /* Length of device entry is in the top two bits of Type field above */ 1220 1221 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 1222 1223 /* Values for device entry Type field above */ 1224 1225 enum AcpiIvrsDeviceEntryType 1226 { 1227 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 1228 1229 ACPI_IVRS_TYPE_PAD4 = 0, 1230 ACPI_IVRS_TYPE_ALL = 1, 1231 ACPI_IVRS_TYPE_SELECT = 2, 1232 ACPI_IVRS_TYPE_START = 3, 1233 ACPI_IVRS_TYPE_END = 4, 1234 1235 /* 8-byte device entries */ 1236 1237 ACPI_IVRS_TYPE_PAD8 = 64, 1238 ACPI_IVRS_TYPE_NOT_USED = 65, 1239 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 1240 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 1241 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 1242 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 1243 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 1244 1245 /* Variable-length device entries */ 1246 1247 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 1248 }; 1249 1250 /* Values for Data field above */ 1251 1252 #define ACPI_IVHD_INIT_PASS (1) 1253 #define ACPI_IVHD_EINT_PASS (1<<1) 1254 #define ACPI_IVHD_NMI_PASS (1<<2) 1255 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 1256 #define ACPI_IVHD_LINT0_PASS (1<<6) 1257 #define ACPI_IVHD_LINT1_PASS (1<<7) 1258 1259 1260 /* Types 0-4: 4-byte device entry */ 1261 1262 typedef struct acpi_ivrs_device4 1263 { 1264 ACPI_IVRS_DE_HEADER Header; 1265 1266 } ACPI_IVRS_DEVICE4; 1267 1268 /* Types 66-67: 8-byte device entry */ 1269 1270 typedef struct acpi_ivrs_device8a 1271 { 1272 ACPI_IVRS_DE_HEADER Header; 1273 UINT8 Reserved1; 1274 UINT16 UsedId; 1275 UINT8 Reserved2; 1276 1277 } ACPI_IVRS_DEVICE8A; 1278 1279 /* Types 70-71: 8-byte device entry */ 1280 1281 typedef struct acpi_ivrs_device8b 1282 { 1283 ACPI_IVRS_DE_HEADER Header; 1284 UINT32 ExtendedData; 1285 1286 } ACPI_IVRS_DEVICE8B; 1287 1288 /* Values for ExtendedData above */ 1289 1290 #define ACPI_IVHD_ATS_DISABLED (1<<31) 1291 1292 /* Type 72: 8-byte device entry */ 1293 1294 typedef struct acpi_ivrs_device8c 1295 { 1296 ACPI_IVRS_DE_HEADER Header; 1297 UINT8 Handle; 1298 UINT16 UsedId; 1299 UINT8 Variety; 1300 1301 } ACPI_IVRS_DEVICE8C; 1302 1303 /* Values for Variety field above */ 1304 1305 #define ACPI_IVHD_IOAPIC 1 1306 #define ACPI_IVHD_HPET 2 1307 1308 /* Type 240: variable-length device entry */ 1309 1310 typedef struct acpi_ivrs_device_hid 1311 { 1312 ACPI_IVRS_DE_HEADER Header; 1313 UINT64 AcpiHid; 1314 UINT64 AcpiCid; 1315 UINT8 UidType; 1316 UINT8 UidLength; 1317 1318 } ACPI_IVRS_DEVICE_HID; 1319 1320 /* Values for UidType above */ 1321 1322 #define ACPI_IVRS_UID_NOT_PRESENT 0 1323 #define ACPI_IVRS_UID_IS_INTEGER 1 1324 #define ACPI_IVRS_UID_IS_STRING 2 1325 1326 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1327 1328 typedef struct acpi_ivrs_memory 1329 { 1330 ACPI_IVRS_HEADER Header; 1331 UINT16 AuxData; 1332 UINT64 Reserved; 1333 UINT64 StartAddress; 1334 UINT64 MemoryLength; 1335 1336 } ACPI_IVRS_MEMORY; 1337 1338 /******************************************************************************* 1339 * 1340 * KEYP - Key Programming Interface for Root Complex Integrity and Data 1341 * Encryption (IDE) 1342 * Version 1 1343 * 1344 * Conforms to "Key Programming Interface for Root Complex Integrity and Data 1345 * Encryption (IDE)" document. See under ACPI-Related Documents. 1346 * 1347 ******************************************************************************/ 1348 typedef struct acpi_table_keyp { 1349 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1350 UINT32 Reserved; 1351 } ACPI_TABLE_KEYP; 1352 1353 /* KEYP common subtable header */ 1354 1355 typedef struct acpi_keyp_common_header { 1356 UINT8 Type; 1357 UINT8 Reserved; 1358 UINT16 Length; 1359 } ACPI_KEYP_COMMON_HEADER; 1360 1361 /* Values for Type field above */ 1362 1363 enum AcpiKeypType 1364 { 1365 ACPI_KEYP_TYPE_CONFIG_UNIT = 0, 1366 }; 1367 1368 /* Root Port Information Structure */ 1369 1370 typedef struct acpi_keyp_rp_info { 1371 UINT16 Segment; 1372 UINT8 Bus; 1373 UINT8 Devfn; 1374 } ACPI_KEYP_RP_INFO; 1375 1376 /* Key Configuration Unit Structure */ 1377 1378 typedef struct acpi_keyp_config_unit { 1379 ACPI_KEYP_COMMON_HEADER Header; 1380 UINT8 ProtocolType; 1381 UINT8 Version; 1382 UINT8 RootPortCount; 1383 UINT8 Flags; 1384 UINT64 RegisterBaseAddress; 1385 ACPI_KEYP_RP_INFO RpInfo[]; 1386 } ACPI_KEYP_CONFIG_UNIT; 1387 1388 enum AcpiKeypProtocolType 1389 { 1390 ACPI_KEYP_PROTO_TYPE_INVALID = 0, 1391 ACPI_KEYP_PROTO_TYPE_PCIE, 1392 ACPI_KEYP_PROTO_TYPE_CXL, 1393 ACPI_KEYP_PROTO_TYPE_RESERVED 1394 }; 1395 1396 #define ACPI_KEYP_F_TVM_USABLE (1) 1397 1398 /******************************************************************************* 1399 * 1400 * LPIT - Low Power Idle Table 1401 * 1402 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1403 * 1404 ******************************************************************************/ 1405 1406 typedef struct acpi_table_lpit 1407 { 1408 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1409 1410 } ACPI_TABLE_LPIT; 1411 1412 1413 /* LPIT subtable header */ 1414 1415 typedef struct acpi_lpit_header 1416 { 1417 UINT32 Type; /* Subtable type */ 1418 UINT32 Length; /* Subtable length */ 1419 UINT16 UniqueId; 1420 UINT16 Reserved; 1421 UINT32 Flags; 1422 1423 } ACPI_LPIT_HEADER; 1424 1425 /* Values for subtable Type above */ 1426 1427 enum AcpiLpitType 1428 { 1429 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1430 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1431 }; 1432 1433 /* Masks for Flags field above */ 1434 1435 #define ACPI_LPIT_STATE_DISABLED (1) 1436 #define ACPI_LPIT_NO_COUNTER (1<<1) 1437 1438 /* 1439 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1440 */ 1441 1442 /* 0x00: Native C-state instruction based LPI structure */ 1443 1444 typedef struct acpi_lpit_native 1445 { 1446 ACPI_LPIT_HEADER Header; 1447 ACPI_GENERIC_ADDRESS EntryTrigger; 1448 UINT32 Residency; 1449 UINT32 Latency; 1450 ACPI_GENERIC_ADDRESS ResidencyCounter; 1451 UINT64 CounterFrequency; 1452 1453 } ACPI_LPIT_NATIVE; 1454 1455 1456 /******************************************************************************* 1457 * 1458 * MADT - Multiple APIC Description Table 1459 * Version 3 1460 * 1461 ******************************************************************************/ 1462 1463 typedef struct acpi_table_madt 1464 { 1465 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1466 UINT32 Address; /* Physical address of local APIC */ 1467 UINT32 Flags; 1468 1469 } ACPI_TABLE_MADT; 1470 1471 /* Masks for Flags field above */ 1472 1473 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1474 1475 /* Values for PCATCompat flag */ 1476 1477 #define ACPI_MADT_DUAL_PIC 1 1478 #define ACPI_MADT_MULTIPLE_APIC 0 1479 1480 1481 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1482 1483 enum AcpiMadtType 1484 { 1485 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1486 ACPI_MADT_TYPE_IO_APIC = 1, 1487 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1488 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1489 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1490 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1491 ACPI_MADT_TYPE_IO_SAPIC = 6, 1492 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1493 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1494 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1495 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1496 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1497 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1498 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1499 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1500 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1501 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1502 ACPI_MADT_TYPE_CORE_PIC = 17, 1503 ACPI_MADT_TYPE_LIO_PIC = 18, 1504 ACPI_MADT_TYPE_HT_PIC = 19, 1505 ACPI_MADT_TYPE_EIO_PIC = 20, 1506 ACPI_MADT_TYPE_MSI_PIC = 21, 1507 ACPI_MADT_TYPE_BIO_PIC = 22, 1508 ACPI_MADT_TYPE_LPC_PIC = 23, 1509 ACPI_MADT_TYPE_RINTC = 24, 1510 ACPI_MADT_TYPE_IMSIC = 25, 1511 ACPI_MADT_TYPE_APLIC = 26, 1512 ACPI_MADT_TYPE_PLIC = 27, 1513 ACPI_MADT_TYPE_GICV5_IRS = 28, 1514 ACPI_MADT_TYPE_GICV5_ITS = 29, 1515 ACPI_MADT_TYPE_GICV5_ITS_TRANSLATE = 30, 1516 ACPI_MADT_TYPE_RESERVED = 31, /* 31 to 0x7F are reserved */ 1517 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1518 }; 1519 1520 1521 /* 1522 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1523 */ 1524 1525 /* 0: Processor Local APIC */ 1526 1527 typedef struct acpi_madt_local_apic 1528 { 1529 ACPI_SUBTABLE_HEADER Header; 1530 UINT8 ProcessorId; /* ACPI processor id */ 1531 UINT8 Id; /* Processor's local APIC id */ 1532 UINT32 LapicFlags; 1533 1534 } ACPI_MADT_LOCAL_APIC; 1535 1536 1537 /* 1: IO APIC */ 1538 1539 typedef struct acpi_madt_io_apic 1540 { 1541 ACPI_SUBTABLE_HEADER Header; 1542 UINT8 Id; /* I/O APIC ID */ 1543 UINT8 Reserved; /* Reserved - must be zero */ 1544 UINT32 Address; /* APIC physical address */ 1545 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1546 1547 } ACPI_MADT_IO_APIC; 1548 1549 1550 /* 2: Interrupt Override */ 1551 1552 typedef struct acpi_madt_interrupt_override 1553 { 1554 ACPI_SUBTABLE_HEADER Header; 1555 UINT8 Bus; /* 0 - ISA */ 1556 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1557 UINT32 GlobalIrq; /* Global system interrupt */ 1558 UINT16 IntiFlags; 1559 1560 } ACPI_MADT_INTERRUPT_OVERRIDE; 1561 1562 1563 /* 3: NMI Source */ 1564 1565 typedef struct acpi_madt_nmi_source 1566 { 1567 ACPI_SUBTABLE_HEADER Header; 1568 UINT16 IntiFlags; 1569 UINT32 GlobalIrq; /* Global system interrupt */ 1570 1571 } ACPI_MADT_NMI_SOURCE; 1572 1573 1574 /* 4: Local APIC NMI */ 1575 1576 typedef struct acpi_madt_local_apic_nmi 1577 { 1578 ACPI_SUBTABLE_HEADER Header; 1579 UINT8 ProcessorId; /* ACPI processor id */ 1580 UINT16 IntiFlags; 1581 UINT8 Lint; /* LINTn to which NMI is connected */ 1582 1583 } ACPI_MADT_LOCAL_APIC_NMI; 1584 1585 1586 /* 5: Address Override */ 1587 1588 typedef struct acpi_madt_local_apic_override 1589 { 1590 ACPI_SUBTABLE_HEADER Header; 1591 UINT16 Reserved; /* Reserved, must be zero */ 1592 UINT64 Address; /* APIC physical address */ 1593 1594 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1595 1596 1597 /* 6: I/O Sapic */ 1598 1599 typedef struct acpi_madt_io_sapic 1600 { 1601 ACPI_SUBTABLE_HEADER Header; 1602 UINT8 Id; /* I/O SAPIC ID */ 1603 UINT8 Reserved; /* Reserved, must be zero */ 1604 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1605 UINT64 Address; /* SAPIC physical address */ 1606 1607 } ACPI_MADT_IO_SAPIC; 1608 1609 1610 /* 7: Local Sapic */ 1611 1612 typedef struct acpi_madt_local_sapic 1613 { 1614 ACPI_SUBTABLE_HEADER Header; 1615 UINT8 ProcessorId; /* ACPI processor id */ 1616 UINT8 Id; /* SAPIC ID */ 1617 UINT8 Eid; /* SAPIC EID */ 1618 UINT8 Reserved[3]; /* Reserved, must be zero */ 1619 UINT32 LapicFlags; 1620 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1621 char UidString[]; /* String UID - ACPI 3.0 */ 1622 1623 } ACPI_MADT_LOCAL_SAPIC; 1624 1625 1626 /* 8: Platform Interrupt Source */ 1627 1628 typedef struct acpi_madt_interrupt_source 1629 { 1630 ACPI_SUBTABLE_HEADER Header; 1631 UINT16 IntiFlags; 1632 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1633 UINT8 Id; /* Processor ID */ 1634 UINT8 Eid; /* Processor EID */ 1635 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1636 UINT32 GlobalIrq; /* Global system interrupt */ 1637 UINT32 Flags; /* Interrupt Source Flags */ 1638 1639 } ACPI_MADT_INTERRUPT_SOURCE; 1640 1641 /* Masks for Flags field above */ 1642 1643 #define ACPI_MADT_CPEI_OVERRIDE (1) 1644 1645 1646 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1647 1648 typedef struct acpi_madt_local_x2apic 1649 { 1650 ACPI_SUBTABLE_HEADER Header; 1651 UINT16 Reserved; /* Reserved - must be zero */ 1652 UINT32 LocalApicId; /* Processor x2APIC ID */ 1653 UINT32 LapicFlags; 1654 UINT32 Uid; /* ACPI processor UID */ 1655 1656 } ACPI_MADT_LOCAL_X2APIC; 1657 1658 1659 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1660 1661 typedef struct acpi_madt_local_x2apic_nmi 1662 { 1663 ACPI_SUBTABLE_HEADER Header; 1664 UINT16 IntiFlags; 1665 UINT32 Uid; /* ACPI processor UID */ 1666 UINT8 Lint; /* LINTn to which NMI is connected */ 1667 UINT8 Reserved[3]; /* Reserved - must be zero */ 1668 1669 } ACPI_MADT_LOCAL_X2APIC_NMI; 1670 1671 1672 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 + ACPI 6.7 changes) */ 1673 1674 typedef struct acpi_madt_generic_interrupt 1675 { 1676 ACPI_SUBTABLE_HEADER Header; 1677 UINT16 Reserved; /* Reserved - must be zero */ 1678 UINT32 CpuInterfaceNumber; 1679 UINT32 Uid; 1680 UINT32 Flags; 1681 UINT32 ParkingVersion; 1682 UINT32 PerformanceInterrupt; 1683 UINT64 ParkedAddress; 1684 UINT64 BaseAddress; 1685 UINT64 GicvBaseAddress; 1686 UINT64 GichBaseAddress; 1687 UINT32 VgicInterrupt; 1688 UINT64 GicrBaseAddress; 1689 UINT64 ArmMpidr; 1690 UINT8 EfficiencyClass; 1691 UINT8 Reserved2[1]; 1692 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1693 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1694 UINT16 Iaffid; /* ACPI 6.7 */ 1695 UINT32 IrsId; 1696 1697 } ACPI_MADT_GENERIC_INTERRUPT; 1698 1699 /* Masks for Flags field above */ 1700 1701 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1702 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1703 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1704 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1705 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1706 1707 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1708 1709 typedef struct acpi_madt_generic_distributor 1710 { 1711 ACPI_SUBTABLE_HEADER Header; 1712 UINT16 Reserved; /* Reserved - must be zero */ 1713 UINT32 GicId; 1714 UINT64 BaseAddress; 1715 UINT32 GlobalIrqBase; 1716 UINT8 Version; 1717 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1718 1719 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1720 1721 /* Values for Version field above and Version field in acpi_madt_gicv5_irs */ 1722 1723 enum AcpiMadtGicVersion 1724 { 1725 ACPI_MADT_GIC_VERSION_NONE = 0, 1726 ACPI_MADT_GIC_VERSION_V1 = 1, 1727 ACPI_MADT_GIC_VERSION_V2 = 2, 1728 ACPI_MADT_GIC_VERSION_V3 = 3, 1729 ACPI_MADT_GIC_VERSION_V4 = 4, 1730 ACPI_MADT_GIC_VERSION_V5 = 5, 1731 ACPI_MADT_GIC_VERSION_RESERVED = 6 /* 6 and greater are reserved */ 1732 }; 1733 1734 1735 /* 13: Generic MSI Frame (ACPI 5.1) */ 1736 1737 typedef struct acpi_madt_generic_msi_frame 1738 { 1739 ACPI_SUBTABLE_HEADER Header; 1740 UINT16 Reserved; /* Reserved - must be zero */ 1741 UINT32 MsiFrameId; 1742 UINT64 BaseAddress; 1743 UINT32 Flags; 1744 UINT16 SpiCount; 1745 UINT16 SpiBase; 1746 1747 } ACPI_MADT_GENERIC_MSI_FRAME; 1748 1749 /* Masks for Flags field above */ 1750 1751 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1752 1753 1754 /* 14: Generic Redistributor (ACPI 5.1) */ 1755 1756 typedef struct acpi_madt_generic_redistributor 1757 { 1758 ACPI_SUBTABLE_HEADER Header; 1759 UINT8 Flags; 1760 UINT8 Reserved; /* reserved - must be zero */ 1761 UINT64 BaseAddress; 1762 UINT32 Length; 1763 1764 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1765 1766 #define ACPI_MADT_GICR_NON_COHERENT (1) 1767 1768 /* 15: Generic Translator (ACPI 6.0) */ 1769 1770 typedef struct acpi_madt_generic_translator 1771 { 1772 ACPI_SUBTABLE_HEADER Header; 1773 UINT8 Flags; 1774 UINT8 Reserved; /* reserved - must be zero */ 1775 UINT32 TranslationId; 1776 UINT64 BaseAddress; 1777 UINT32 Reserved2; 1778 1779 } ACPI_MADT_GENERIC_TRANSLATOR; 1780 1781 #define ACPI_MADT_ITS_NON_COHERENT (1) 1782 1783 /* 16: Multiprocessor wakeup (ACPI 6.6) */ 1784 1785 typedef struct acpi_madt_multiproc_wakeup 1786 { 1787 ACPI_SUBTABLE_HEADER Header; 1788 UINT16 MailboxVersion; 1789 UINT32 Reserved; /* reserved - must be zero */ 1790 UINT64 BaseAddress; 1791 UINT64 ResetVector; 1792 1793 } ACPI_MADT_MULTIPROC_WAKEUP; 1794 1795 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1796 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1797 1798 typedef struct acpi_madt_multiproc_wakeup_mailbox 1799 { 1800 UINT16 Command; 1801 UINT16 Reserved; /* reserved - must be zero */ 1802 UINT32 ApicId; 1803 UINT64 WakeupVector; 1804 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1805 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1806 1807 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1808 1809 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1810 #define ACPI_MP_WAKE_COMMAND_TEST 2 1811 1812 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1813 1814 typedef struct acpi_madt_core_pic { 1815 ACPI_SUBTABLE_HEADER Header; 1816 UINT8 Version; 1817 UINT32 ProcessorId; 1818 UINT32 CoreId; 1819 UINT32 Flags; 1820 } ACPI_MADT_CORE_PIC; 1821 1822 /* Values for Version field above */ 1823 1824 enum AcpiMadtCorePicVersion { 1825 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1826 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1827 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1828 }; 1829 1830 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1831 1832 typedef struct acpi_madt_lio_pic { 1833 ACPI_SUBTABLE_HEADER Header; 1834 UINT8 Version; 1835 UINT64 Address; 1836 UINT16 Size; 1837 UINT8 Cascade[2]; 1838 UINT32 CascadeMap[2]; 1839 } ACPI_MADT_LIO_PIC; 1840 1841 /* Values for Version field above */ 1842 1843 enum AcpiMadtLioPicVersion { 1844 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1845 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1846 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1847 }; 1848 1849 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1850 1851 typedef struct acpi_madt_ht_pic { 1852 ACPI_SUBTABLE_HEADER Header; 1853 UINT8 Version; 1854 UINT64 Address; 1855 UINT16 Size; 1856 UINT8 Cascade[8]; 1857 } ACPI_MADT_HT_PIC; 1858 1859 /* Values for Version field above */ 1860 1861 enum AcpiMadtHtPicVersion { 1862 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1863 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1864 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1865 }; 1866 1867 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1868 1869 typedef struct acpi_madt_eio_pic { 1870 ACPI_SUBTABLE_HEADER Header; 1871 UINT8 Version; 1872 UINT8 Cascade; 1873 UINT8 Node; 1874 UINT64 NodeMap; 1875 } ACPI_MADT_EIO_PIC; 1876 1877 /* Values for Version field above */ 1878 1879 enum AcpiMadtEioPicVersion { 1880 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1881 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1882 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1883 }; 1884 1885 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1886 1887 typedef struct acpi_madt_msi_pic { 1888 ACPI_SUBTABLE_HEADER Header; 1889 UINT8 Version; 1890 UINT64 MsgAddress; 1891 UINT32 Start; 1892 UINT32 Count; 1893 } ACPI_MADT_MSI_PIC; 1894 1895 /* Values for Version field above */ 1896 1897 enum AcpiMadtMsiPicVersion { 1898 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1899 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1900 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1901 }; 1902 1903 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1904 1905 typedef struct acpi_madt_bio_pic { 1906 ACPI_SUBTABLE_HEADER Header; 1907 UINT8 Version; 1908 UINT64 Address; 1909 UINT16 Size; 1910 UINT16 Id; 1911 UINT16 GsiBase; 1912 } ACPI_MADT_BIO_PIC; 1913 1914 /* Values for Version field above */ 1915 1916 enum AcpiMadtBioPicVersion { 1917 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1918 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1919 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1920 }; 1921 1922 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1923 1924 typedef struct acpi_madt_lpc_pic { 1925 ACPI_SUBTABLE_HEADER Header; 1926 UINT8 Version; 1927 UINT64 Address; 1928 UINT16 Size; 1929 UINT8 Cascade; 1930 } ACPI_MADT_LPC_PIC; 1931 1932 /* Values for Version field above */ 1933 1934 enum AcpiMadtLpcPicVersion { 1935 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1936 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1937 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1938 }; 1939 1940 /* 24: RISC-V INTC */ 1941 typedef struct acpi_madt_rintc { 1942 ACPI_SUBTABLE_HEADER Header; 1943 UINT8 Version; 1944 UINT8 Reserved; 1945 UINT32 Flags; 1946 UINT64 HartId; 1947 UINT32 Uid; /* ACPI processor UID */ 1948 UINT32 ExtIntcId; /* External INTC Id */ 1949 UINT64 ImsicAddr; /* IMSIC base address */ 1950 UINT32 ImsicSize; /* IMSIC size */ 1951 } ACPI_MADT_RINTC; 1952 1953 /* Values for RISC-V INTC Version field above */ 1954 1955 enum AcpiMadtRintcVersion { 1956 ACPI_MADT_RINTC_VERSION_NONE = 0, 1957 ACPI_MADT_RINTC_VERSION_V1 = 1, 1958 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1959 }; 1960 1961 /* 25: RISC-V IMSIC */ 1962 typedef struct acpi_madt_imsic { 1963 ACPI_SUBTABLE_HEADER Header; 1964 UINT8 Version; 1965 UINT8 Reserved; 1966 UINT32 Flags; 1967 UINT16 NumIds; 1968 UINT16 NumGuestIds; 1969 UINT8 GuestIndexBits; 1970 UINT8 HartIndexBits; 1971 UINT8 GroupIndexBits; 1972 UINT8 GroupIndexShift; 1973 } ACPI_MADT_IMSIC; 1974 1975 /* 26: RISC-V APLIC */ 1976 typedef struct acpi_madt_aplic { 1977 ACPI_SUBTABLE_HEADER Header; 1978 UINT8 Version; 1979 UINT8 Id; 1980 UINT32 Flags; 1981 UINT8 HwId[8]; 1982 UINT16 NumIdcs; 1983 UINT16 NumSources; 1984 UINT32 GsiBase; 1985 UINT64 BaseAddr; 1986 UINT32 Size; 1987 } ACPI_MADT_APLIC; 1988 1989 /* 27: RISC-V PLIC */ 1990 typedef struct acpi_madt_plic { 1991 ACPI_SUBTABLE_HEADER Header; 1992 UINT8 Version; 1993 UINT8 Id; 1994 UINT8 HwId[8]; 1995 UINT16 NumIrqs; 1996 UINT16 MaxPrio; 1997 UINT32 Flags; 1998 UINT32 Size; 1999 UINT64 BaseAddr; 2000 UINT32 GsiBase; 2001 } ACPI_MADT_PLIC; 2002 2003 /* 28: Arm GICv5 IRS (ACPI 6.7) */ 2004 typedef struct acpi_madt_gicv5_irs { 2005 ACPI_SUBTABLE_HEADER Header; 2006 UINT8 Version; 2007 UINT8 Reserved; 2008 UINT32 IrsId; 2009 UINT32 Flags; 2010 UINT32 Reserved2; 2011 UINT64 ConfigBaseAddress; 2012 UINT64 SetlpiBaseAddress; 2013 } ACPI_MADT_GICV5_IRS; 2014 2015 #define ACPI_MADT_IRS_NON_COHERENT (1) 2016 2017 2018 /* 29: Arm GICv5 ITS Config Frame (ACPI 6.7) */ 2019 typedef struct acpi_madt_gicv5_translator 2020 { 2021 ACPI_SUBTABLE_HEADER Header; 2022 UINT8 Flags; 2023 UINT8 Reserved; /* reserved - must be zero */ 2024 UINT32 TranslatorId; 2025 UINT64 BaseAddress; 2026 2027 } ACPI_MADT_GICv5_ITS; 2028 2029 #define ACPI_MADT_GICV5_ITS_NON_COHERENT (1) 2030 2031 /* 30: Arm GICv5 ITS Translate Frame (ACPI 6.7) */ 2032 typedef struct acpi_madt_gicv5_translate_frame 2033 { 2034 ACPI_SUBTABLE_HEADER Header; 2035 UINT16 Reserved; /* reserved - must be zero */ 2036 UINT32 LinkedTranslatorId; 2037 UINT32 TranslateFrameId; 2038 UINT32 Reserved2; 2039 UINT64 BaseAddress; 2040 2041 } ACPI_MADT_GICv5_ITS_TRANSLATE; 2042 2043 2044 /* 80: OEM data */ 2045 2046 typedef struct acpi_madt_oem_data 2047 { 2048 ACPI_FLEX_ARRAY(UINT8, OemData); 2049 } ACPI_MADT_OEM_DATA; 2050 2051 2052 /* 2053 * Common flags fields for MADT subtables 2054 */ 2055 2056 /* MADT Local APIC flags */ 2057 2058 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 2059 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 2060 2061 /* MADT MPS INTI flags (IntiFlags) */ 2062 2063 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 2064 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 2065 2066 /* Values for MPS INTI flags */ 2067 2068 #define ACPI_MADT_POLARITY_CONFORMS 0 2069 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 2070 #define ACPI_MADT_POLARITY_RESERVED 2 2071 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 2072 2073 #define ACPI_MADT_TRIGGER_CONFORMS (0) 2074 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 2075 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 2076 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 2077 2078 2079 /******************************************************************************* 2080 * 2081 * MCFG - PCI Memory Mapped Configuration table and subtable 2082 * Version 1 2083 * 2084 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 2085 * 2086 ******************************************************************************/ 2087 2088 typedef struct acpi_table_mcfg 2089 { 2090 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2091 UINT8 Reserved[8]; 2092 2093 } ACPI_TABLE_MCFG; 2094 2095 2096 /* Subtable */ 2097 2098 typedef struct acpi_mcfg_allocation 2099 { 2100 UINT64 Address; /* Base address, processor-relative */ 2101 UINT16 PciSegment; /* PCI segment group number */ 2102 UINT8 StartBusNumber; /* Starting PCI Bus number */ 2103 UINT8 EndBusNumber; /* Final PCI Bus number */ 2104 UINT32 Reserved; 2105 2106 } ACPI_MCFG_ALLOCATION; 2107 2108 2109 /******************************************************************************* 2110 * 2111 * MCHI - Management Controller Host Interface Table 2112 * Version 1 2113 * 2114 * Conforms to "Management Component Transport Protocol (MCTP) Host 2115 * Interface Specification", Revision 1.0.0a, October 13, 2009 2116 * 2117 ******************************************************************************/ 2118 2119 typedef struct acpi_table_mchi 2120 { 2121 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2122 UINT8 InterfaceType; 2123 UINT8 Protocol; 2124 UINT64 ProtocolData; 2125 UINT8 InterruptType; 2126 UINT8 Gpe; 2127 UINT8 PciDeviceFlag; 2128 UINT32 GlobalInterrupt; 2129 ACPI_GENERIC_ADDRESS ControlRegister; 2130 UINT8 PciSegment; 2131 UINT8 PciBus; 2132 UINT8 PciDevice; 2133 UINT8 PciFunction; 2134 2135 } ACPI_TABLE_MCHI; 2136 2137 /******************************************************************************* 2138 * 2139 * MPAM - Memory System Resource Partitioning and Monitoring 2140 * 2141 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 2142 * Document number: ARM DEN 0065, December, 2022. 2143 * 2144 ******************************************************************************/ 2145 2146 /* MPAM RIS locator types. Table 11, Location types */ 2147 enum AcpiMpamLocatorType { 2148 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 2149 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 2150 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 2151 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 2152 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 2153 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 2154 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 2155 }; 2156 2157 /* MPAM Functional dependency descriptor. Table 10 */ 2158 typedef struct acpi_mpam_func_deps 2159 { 2160 UINT32 Producer; 2161 UINT32 Reserved; 2162 } ACPI_MPAM_FUNC_DEPS; 2163 2164 /* MPAM Processor cache locator descriptor. Table 13 */ 2165 typedef struct acpi_mpam_resource_cache_locator 2166 { 2167 UINT64 CacheReference; 2168 UINT32 Reserved; 2169 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 2170 2171 /* MPAM Memory locator descriptor. Table 14 */ 2172 typedef struct acpi_mpam_resource_memory_locator 2173 { 2174 UINT64 ProximityDomain; 2175 UINT32 Reserved; 2176 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 2177 2178 /* MPAM SMMU locator descriptor. Table 15 */ 2179 typedef struct acpi_mpam_resource_smmu_locator 2180 { 2181 UINT64 SmmuInterface; 2182 UINT32 Reserved; 2183 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 2184 2185 /* MPAM Memory-side cache locator descriptor. Table 16 */ 2186 typedef struct acpi_mpam_resource_memcache_locator 2187 { 2188 UINT8 Reserved[7]; 2189 UINT8 Level; 2190 UINT32 Reference; 2191 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 2192 2193 /* MPAM ACPI device locator descriptor. Table 17 */ 2194 typedef struct acpi_mpam_resource_acpi_locator 2195 { 2196 UINT64 AcpiHwId; 2197 UINT32 AcpiUniqueId; 2198 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 2199 2200 /* MPAM Interconnect locator descriptor. Table 18 */ 2201 typedef struct acpi_mpam_resource_interconnect_locator 2202 { 2203 UINT64 InterConnectDescTblOff; 2204 UINT32 Reserved; 2205 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 2206 2207 /* MPAM Locator structure. Table 12 */ 2208 typedef struct acpi_mpam_resource_generic_locator 2209 { 2210 UINT64 Descriptor1; 2211 UINT32 Descriptor2; 2212 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 2213 2214 typedef union acpi_mpam_resource_locator 2215 { 2216 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 2217 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 2218 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 2219 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 2220 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 2221 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 2222 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 2223 } ACPI_MPAM_RESOURCE_LOCATOR; 2224 2225 /* Memory System Component Resource Node Structure Table 9 */ 2226 typedef struct acpi_mpam_resource_node 2227 { 2228 UINT32 Identifier; 2229 UINT8 RISIndex; 2230 UINT16 Reserved1; 2231 UINT8 LocatorType; 2232 ACPI_MPAM_RESOURCE_LOCATOR Locator; 2233 UINT32 NumFunctionalDeps; 2234 } ACPI_MPAM_RESOURCE_NODE; 2235 2236 /* Memory System Component (MSC) Node Structure. Table 4 */ 2237 typedef struct acpi_mpam_msc_node 2238 { 2239 UINT16 Length; 2240 UINT8 InterfaceType; 2241 UINT8 Reserved; 2242 UINT32 Identifier; 2243 UINT64 BaseAddress; 2244 UINT32 MMIOSize; 2245 UINT32 OverflowInterrupt; 2246 UINT32 OverflowInterruptFlags; 2247 UINT32 Reserved1; 2248 UINT32 OverflowInterruptAffinity; 2249 UINT32 ErrorInterrupt; 2250 UINT32 ErrorInterruptFlags; 2251 UINT32 Reserved2; 2252 UINT32 ErrorInterruptAffinity; 2253 UINT32 MaxNrdyUsec; 2254 UINT64 HardwareIdLinkedDevice; 2255 UINT32 InstanceIdLinkedDevice; 2256 UINT32 NumResourceNodes; 2257 } ACPI_MPAM_MSC_NODE; 2258 2259 typedef struct acpi_table_mpam 2260 { 2261 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2262 } ACPI_TABLE_MPAM; 2263 2264 /******************************************************************************* 2265 * 2266 * MPST - Memory Power State Table (ACPI 5.0) 2267 * Version 1 2268 * 2269 ******************************************************************************/ 2270 2271 #define ACPI_MPST_CHANNEL_INFO \ 2272 UINT8 ChannelId; \ 2273 UINT8 Reserved1[3]; \ 2274 UINT16 PowerNodeCount; \ 2275 UINT16 Reserved2; 2276 2277 /* Main table */ 2278 2279 typedef struct acpi_table_mpst 2280 { 2281 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2282 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2283 2284 } ACPI_TABLE_MPST; 2285 2286 2287 /* Memory Platform Communication Channel Info */ 2288 2289 typedef struct acpi_mpst_channel 2290 { 2291 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 2292 2293 } ACPI_MPST_CHANNEL; 2294 2295 2296 /* Memory Power Node Structure */ 2297 2298 typedef struct acpi_mpst_power_node 2299 { 2300 UINT8 Flags; 2301 UINT8 Reserved1; 2302 UINT16 NodeId; 2303 UINT32 Length; 2304 UINT64 RangeAddress; 2305 UINT64 RangeLength; 2306 UINT32 NumPowerStates; 2307 UINT32 NumPhysicalComponents; 2308 2309 } ACPI_MPST_POWER_NODE; 2310 2311 /* Values for Flags field above */ 2312 2313 #define ACPI_MPST_ENABLED 1 2314 #define ACPI_MPST_POWER_MANAGED 2 2315 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 2316 2317 2318 /* Memory Power State Structure (follows POWER_NODE above) */ 2319 2320 typedef struct acpi_mpst_power_state 2321 { 2322 UINT8 PowerState; 2323 UINT8 InfoIndex; 2324 2325 } ACPI_MPST_POWER_STATE; 2326 2327 2328 /* Physical Component ID Structure (follows POWER_STATE above) */ 2329 2330 typedef struct acpi_mpst_component 2331 { 2332 UINT16 ComponentId; 2333 2334 } ACPI_MPST_COMPONENT; 2335 2336 2337 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 2338 2339 typedef struct acpi_mpst_data_hdr 2340 { 2341 UINT16 CharacteristicsCount; 2342 UINT16 Reserved; 2343 2344 } ACPI_MPST_DATA_HDR; 2345 2346 typedef struct acpi_mpst_power_data 2347 { 2348 UINT8 StructureId; 2349 UINT8 Flags; 2350 UINT16 Reserved1; 2351 UINT32 AveragePower; 2352 UINT32 PowerSaving; 2353 UINT64 ExitLatency; 2354 UINT64 Reserved2; 2355 2356 } ACPI_MPST_POWER_DATA; 2357 2358 /* Values for Flags field above */ 2359 2360 #define ACPI_MPST_PRESERVE 1 2361 #define ACPI_MPST_AUTOENTRY 2 2362 #define ACPI_MPST_AUTOEXIT 4 2363 2364 2365 /* Shared Memory Region (not part of an ACPI table) */ 2366 2367 typedef struct acpi_mpst_shared 2368 { 2369 UINT32 Signature; 2370 UINT16 PccCommand; 2371 UINT16 PccStatus; 2372 UINT32 CommandRegister; 2373 UINT32 StatusRegister; 2374 UINT32 PowerStateId; 2375 UINT32 PowerNodeId; 2376 UINT64 EnergyConsumed; 2377 UINT64 AveragePower; 2378 2379 } ACPI_MPST_SHARED; 2380 2381 2382 /******************************************************************************* 2383 * 2384 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 2385 * Version 1 2386 * 2387 ******************************************************************************/ 2388 2389 typedef struct acpi_table_msct 2390 { 2391 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2392 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 2393 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 2394 UINT32 MaxClockDomains; /* Max number of clock domains */ 2395 UINT64 MaxAddress; /* Max physical address in system */ 2396 2397 } ACPI_TABLE_MSCT; 2398 2399 2400 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 2401 2402 typedef struct acpi_msct_proximity 2403 { 2404 UINT8 Revision; 2405 UINT8 Length; 2406 UINT32 RangeStart; /* Start of domain range */ 2407 UINT32 RangeEnd; /* End of domain range */ 2408 UINT32 ProcessorCapacity; 2409 UINT64 MemoryCapacity; /* In bytes */ 2410 2411 } ACPI_MSCT_PROXIMITY; 2412 2413 2414 /******************************************************************************* 2415 * 2416 * MRRM - Memory Range and Region Mapping (MRRM) table 2417 * Conforms to "Intel Resource Director Technology Architecture Specification" 2418 * Version 1.1, January 2025 2419 * 2420 ******************************************************************************/ 2421 2422 typedef struct acpi_table_mrrm 2423 { 2424 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2425 UINT8 MaxMemRegion; /* Max Memory Regions supported */ 2426 UINT8 Flags; /* Region assignment type */ 2427 UINT8 Reserved[26]; 2428 UINT8 Memory_Range_Entry[]; 2429 2430 } ACPI_TABLE_MRRM; 2431 2432 /* Flags */ 2433 #define ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS (1<<0) 2434 2435 /******************************************************************************* 2436 * 2437 * Memory Range entry - Memory Range entry in MRRM table 2438 * 2439 ******************************************************************************/ 2440 2441 typedef struct acpi_mrrm_mem_range_entry 2442 { 2443 ACPI_SUBTBL_HDR_16 Header; 2444 UINT32 Reserved0; /* Reserved */ 2445 UINT64 AddrBase; /* Base addr of the mem range */ 2446 UINT64 AddrLen; /* Length of the mem range */ 2447 UINT16 RegionIdFlags; /* Valid local or remote Region-ID */ 2448 UINT8 LocalRegionId; /* Platform-assigned static local Region-ID */ 2449 UINT8 RemoteRegionId; /* Platform-assigned static remote Region-ID */ 2450 UINT32 Reserved1; /* Reserved */ 2451 /* Region-ID Programming Registers[] */ 2452 2453 } ACPI_MRRM_MEM_RANGE_ENTRY; 2454 2455 /* Values for RegionIdFlags above */ 2456 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL (1<<0) 2457 #define ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE (1<<1) 2458 2459 2460 /******************************************************************************* 2461 * 2462 * MSDM - Microsoft Data Management table 2463 * 2464 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 2465 * November 29, 2011. Copyright 2011 Microsoft 2466 * 2467 ******************************************************************************/ 2468 2469 /* Basic MSDM table is only the common ACPI header */ 2470 2471 typedef struct acpi_table_msdm 2472 { 2473 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2474 2475 } ACPI_TABLE_MSDM; 2476 2477 2478 /******************************************************************************* 2479 * 2480 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2481 * Version 1 2482 * 2483 ******************************************************************************/ 2484 2485 typedef struct acpi_table_nfit 2486 { 2487 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2488 UINT32 Reserved; /* Reserved, must be zero */ 2489 2490 } ACPI_TABLE_NFIT; 2491 2492 /* Subtable header for NFIT */ 2493 2494 typedef struct acpi_nfit_header 2495 { 2496 UINT16 Type; 2497 UINT16 Length; 2498 2499 } ACPI_NFIT_HEADER; 2500 2501 2502 /* Values for subtable type in ACPI_NFIT_HEADER */ 2503 2504 enum AcpiNfitType 2505 { 2506 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2507 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2508 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2509 ACPI_NFIT_TYPE_SMBIOS = 3, 2510 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2511 ACPI_NFIT_TYPE_DATA_REGION = 5, 2512 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2513 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2514 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2515 }; 2516 2517 /* 2518 * NFIT Subtables 2519 */ 2520 2521 /* 0: System Physical Address Range Structure */ 2522 2523 typedef struct acpi_nfit_system_address 2524 { 2525 ACPI_NFIT_HEADER Header; 2526 UINT16 RangeIndex; 2527 UINT16 Flags; 2528 UINT32 Reserved; /* Reserved, must be zero */ 2529 UINT32 ProximityDomain; 2530 UINT8 RangeGuid[16]; 2531 UINT64 Address; 2532 UINT64 Length; 2533 UINT64 MemoryMapping; 2534 UINT64 LocationCookie; /* ACPI 6.4 */ 2535 2536 } ACPI_NFIT_SYSTEM_ADDRESS; 2537 2538 /* Flags */ 2539 2540 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2541 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2542 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2543 2544 /* Range Type GUIDs appear in the include/acuuid.h file */ 2545 2546 2547 /* 1: Memory Device to System Address Range Map Structure */ 2548 2549 typedef struct acpi_nfit_memory_map 2550 { 2551 ACPI_NFIT_HEADER Header; 2552 UINT32 DeviceHandle; 2553 UINT16 PhysicalId; 2554 UINT16 RegionId; 2555 UINT16 RangeIndex; 2556 UINT16 RegionIndex; 2557 UINT64 RegionSize; 2558 UINT64 RegionOffset; 2559 UINT64 Address; 2560 UINT16 InterleaveIndex; 2561 UINT16 InterleaveWays; 2562 UINT16 Flags; 2563 UINT16 Reserved; /* Reserved, must be zero */ 2564 2565 } ACPI_NFIT_MEMORY_MAP; 2566 2567 /* Flags */ 2568 2569 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2570 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2571 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2572 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2573 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2574 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2575 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2576 2577 2578 /* 2: Interleave Structure */ 2579 2580 typedef struct acpi_nfit_interleave 2581 { 2582 ACPI_NFIT_HEADER Header; 2583 UINT16 InterleaveIndex; 2584 UINT16 Reserved; /* Reserved, must be zero */ 2585 UINT32 LineCount; 2586 UINT32 LineSize; 2587 UINT32 LineOffset[]; /* Variable length */ 2588 2589 } ACPI_NFIT_INTERLEAVE; 2590 2591 2592 /* 3: SMBIOS Management Information Structure */ 2593 2594 typedef struct acpi_nfit_smbios 2595 { 2596 ACPI_NFIT_HEADER Header; 2597 UINT32 Reserved; /* Reserved, must be zero */ 2598 UINT8 Data[]; /* Variable length */ 2599 2600 } ACPI_NFIT_SMBIOS; 2601 2602 2603 /* 4: NVDIMM Control Region Structure */ 2604 2605 typedef struct acpi_nfit_control_region 2606 { 2607 ACPI_NFIT_HEADER Header; 2608 UINT16 RegionIndex; 2609 UINT16 VendorId; 2610 UINT16 DeviceId; 2611 UINT16 RevisionId; 2612 UINT16 SubsystemVendorId; 2613 UINT16 SubsystemDeviceId; 2614 UINT16 SubsystemRevisionId; 2615 UINT8 ValidFields; 2616 UINT8 ManufacturingLocation; 2617 UINT16 ManufacturingDate; 2618 UINT8 Reserved[2]; /* Reserved, must be zero */ 2619 UINT32 SerialNumber; 2620 UINT16 Code; 2621 UINT16 Windows; 2622 UINT64 WindowSize; 2623 UINT64 CommandOffset; 2624 UINT64 CommandSize; 2625 UINT64 StatusOffset; 2626 UINT64 StatusSize; 2627 UINT16 Flags; 2628 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2629 2630 } ACPI_NFIT_CONTROL_REGION; 2631 2632 /* Flags */ 2633 2634 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2635 2636 /* ValidFields bits */ 2637 2638 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2639 2640 2641 /* 5: NVDIMM Block Data Window Region Structure */ 2642 2643 typedef struct acpi_nfit_data_region 2644 { 2645 ACPI_NFIT_HEADER Header; 2646 UINT16 RegionIndex; 2647 UINT16 Windows; 2648 UINT64 Offset; 2649 UINT64 Size; 2650 UINT64 Capacity; 2651 UINT64 StartAddress; 2652 2653 } ACPI_NFIT_DATA_REGION; 2654 2655 2656 /* 6: Flush Hint Address Structure */ 2657 2658 typedef struct acpi_nfit_flush_address 2659 { 2660 ACPI_NFIT_HEADER Header; 2661 UINT32 DeviceHandle; 2662 UINT16 HintCount; 2663 UINT8 Reserved[6]; /* Reserved, must be zero */ 2664 UINT64 HintAddress[]; /* Variable length */ 2665 2666 } ACPI_NFIT_FLUSH_ADDRESS; 2667 2668 2669 /* 7: Platform Capabilities Structure */ 2670 2671 typedef struct acpi_nfit_capabilities 2672 { 2673 ACPI_NFIT_HEADER Header; 2674 UINT8 HighestCapability; 2675 UINT8 Reserved[3]; /* Reserved, must be zero */ 2676 UINT32 Capabilities; 2677 UINT32 Reserved2; 2678 2679 } ACPI_NFIT_CAPABILITIES; 2680 2681 /* Capabilities Flags */ 2682 2683 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2684 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2685 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2686 2687 2688 /* 2689 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2690 */ 2691 typedef struct nfit_device_handle 2692 { 2693 UINT32 Handle; 2694 2695 } NFIT_DEVICE_HANDLE; 2696 2697 /* Device handle construction and extraction macros */ 2698 2699 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2700 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2701 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2702 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2703 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2704 2705 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2706 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2707 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2708 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2709 #define ACPI_NFIT_NODE_ID_OFFSET 16 2710 2711 /* Macro to construct a NFIT/NVDIMM device handle */ 2712 2713 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2714 ((dimm) | \ 2715 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2716 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2717 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2718 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2719 2720 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2721 2722 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2723 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2724 2725 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2726 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2727 2728 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2729 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2730 2731 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2732 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2733 2734 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2735 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2736 2737 2738 /******************************************************************************* 2739 * 2740 * NHLT - Non HDAudio Link Table 2741 * Version 1 2742 * 2743 ******************************************************************************/ 2744 2745 typedef struct acpi_table_nhlt 2746 { 2747 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2748 UINT8 EndpointsCount; 2749 /* 2750 * ACPI_NHLT_ENDPOINT Endpoints[]; 2751 * ACPI_NHLT_CONFIG OEDConfig; 2752 */ 2753 2754 } ACPI_TABLE_NHLT; 2755 2756 typedef struct acpi_nhlt_endpoint 2757 { 2758 UINT32 Length; 2759 UINT8 LinkType; 2760 UINT8 InstanceId; 2761 UINT16 VendorId; 2762 UINT16 DeviceId; 2763 UINT16 RevisionId; 2764 UINT32 SubsystemId; 2765 UINT8 DeviceType; 2766 UINT8 Direction; 2767 UINT8 VirtualBusId; 2768 /* 2769 * ACPI_NHLT_CONFIG DeviceConfig; 2770 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig; 2771 * ACPI_NHLT_DEVICES_INFO DevicesInfo; 2772 */ 2773 2774 } ACPI_NHLT_ENDPOINT; 2775 2776 /* Values for LinkType field above */ 2777 2778 #define ACPI_NHLT_LINKTYPE_HDA 0 2779 #define ACPI_NHLT_LINKTYPE_DSP 1 2780 #define ACPI_NHLT_LINKTYPE_PDM 2 2781 #define ACPI_NHLT_LINKTYPE_SSP 3 2782 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2783 #define ACPI_NHLT_LINKTYPE_SDW 5 2784 #define ACPI_NHLT_LINKTYPE_UAOL 6 2785 2786 /* Values for DeviceId field above */ 2787 2788 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2789 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2790 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2791 2792 /* Values for DeviceType field above */ 2793 2794 /* Device types unique to endpoint of LinkType=PDM */ 2795 #define ACPI_NHLT_DEVICETYPE_PDM 0 2796 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2797 /* Device types unique to endpoint of LinkType=SSP */ 2798 #define ACPI_NHLT_DEVICETYPE_BT 0 2799 #define ACPI_NHLT_DEVICETYPE_FM 1 2800 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2801 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2802 2803 /* Values for Direction field above */ 2804 2805 #define ACPI_NHLT_DIR_RENDER 0 2806 #define ACPI_NHLT_DIR_CAPTURE 1 2807 2808 typedef struct acpi_nhlt_config 2809 { 2810 UINT32 CapabilitiesSize; 2811 UINT8 Capabilities[1]; 2812 2813 } ACPI_NHLT_CONFIG; 2814 2815 typedef struct acpi_nhlt_gendevice_config 2816 { 2817 UINT8 VirtualSlot; 2818 UINT8 ConfigType; 2819 2820 } ACPI_NHLT_GENDEVICE_CONFIG; 2821 2822 /* Values for ConfigType field above */ 2823 2824 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2825 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2826 2827 typedef struct acpi_nhlt_micdevice_config 2828 { 2829 UINT8 VirtualSlot; 2830 UINT8 ConfigType; 2831 UINT8 ArrayType; 2832 2833 } ACPI_NHLT_MICDEVICE_CONFIG; 2834 2835 /* Values for ArrayType field above */ 2836 2837 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2838 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2839 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2840 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2841 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2842 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2843 2844 typedef struct acpi_nhlt_vendor_mic_config 2845 { 2846 UINT8 Type; 2847 UINT8 Panel; 2848 UINT16 SpeakerPositionDistance; /* mm */ 2849 UINT16 HorizontalOffset; /* mm */ 2850 UINT16 VerticalOffset; /* mm */ 2851 UINT8 FrequencyLowBand; /* 5*Hz */ 2852 UINT8 FrequencyHighBand; /* 500*Hz */ 2853 UINT16 DirectionAngle; /* -180 - +180 */ 2854 UINT16 ElevationAngle; /* -180 - +180 */ 2855 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */ 2856 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */ 2857 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */ 2858 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */ 2859 2860 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2861 2862 /* Values for Type field above */ 2863 2864 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2865 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2866 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2867 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2868 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2869 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2870 #define ACPI_NHLT_MICTYPE_RESERVED 6 2871 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2872 2873 /* Values for Panel field above */ 2874 2875 #define ACPI_NHLT_MICLOCATION_TOP 0 2876 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2877 #define ACPI_NHLT_MICLOCATION_LEFT 2 2878 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2879 #define ACPI_NHLT_MICLOCATION_FRONT 4 2880 #define ACPI_NHLT_MICLOCATION_REAR 5 2881 2882 typedef struct acpi_nhlt_vendor_micdevice_config 2883 { 2884 UINT8 VirtualSlot; 2885 UINT8 ConfigType; 2886 UINT8 ArrayType; 2887 UINT8 MicsCount; 2888 ACPI_NHLT_VENDOR_MIC_CONFIG Mics[]; 2889 2890 } ACPI_NHLT_VENDOR_MICDEVICE_CONFIG; 2891 2892 typedef union acpi_nhlt_device_config 2893 { 2894 UINT8 VirtualSlot; 2895 ACPI_NHLT_GENDEVICE_CONFIG Gen; 2896 ACPI_NHLT_MICDEVICE_CONFIG Mic; 2897 ACPI_NHLT_VENDOR_MICDEVICE_CONFIG VendorMic; 2898 2899 } ACPI_NHLT_DEVICE_CONFIG; 2900 2901 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2902 typedef struct acpi_nhlt_wave_formatext 2903 { 2904 UINT16 FormatTag; 2905 UINT16 ChannelCount; 2906 UINT32 SamplesPerSec; 2907 UINT32 AvgBytesPerSec; 2908 UINT16 BlockAlign; 2909 UINT16 BitsPerSample; 2910 UINT16 ExtraFormatSize; 2911 UINT16 ValidBitsPerSample; 2912 UINT32 ChannelMask; 2913 UINT8 Subformat[16]; 2914 2915 } ACPI_NHLT_WAVE_FORMATEXT; 2916 2917 typedef struct acpi_nhlt_format_config 2918 { 2919 ACPI_NHLT_WAVE_FORMATEXT Format; 2920 ACPI_NHLT_CONFIG Config; 2921 2922 } ACPI_NHLT_FORMAT_CONFIG; 2923 2924 typedef struct acpi_nhlt_formats_config 2925 { 2926 UINT8 FormatsCount; 2927 ACPI_NHLT_FORMAT_CONFIG Formats[]; 2928 2929 } ACPI_NHLT_FORMATS_CONFIG; 2930 2931 typedef struct acpi_nhlt_device_info 2932 { 2933 UINT8 Id[16]; 2934 UINT8 InstanceId; 2935 UINT8 PortId; 2936 2937 } ACPI_NHLT_DEVICE_INFO; 2938 2939 typedef struct acpi_nhlt_devices_info 2940 { 2941 UINT8 DevicesCount; 2942 ACPI_NHLT_DEVICE_INFO Devices[]; 2943 2944 } ACPI_NHLT_DEVICES_INFO; 2945 2946 2947 /******************************************************************************* 2948 * 2949 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2950 * Version 2 (ACPI 6.2) 2951 * 2952 ******************************************************************************/ 2953 2954 typedef struct acpi_table_pcct 2955 { 2956 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2957 UINT32 Flags; 2958 UINT64 Reserved; 2959 2960 } ACPI_TABLE_PCCT; 2961 2962 /* Values for Flags field above */ 2963 2964 #define ACPI_PCCT_DOORBELL 1 2965 2966 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2967 2968 enum AcpiPcctType 2969 { 2970 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2971 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2972 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2973 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2974 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2975 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2976 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2977 }; 2978 2979 /* 2980 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2981 */ 2982 2983 /* 0: Generic Communications Subspace */ 2984 2985 typedef struct acpi_pcct_subspace 2986 { 2987 ACPI_SUBTABLE_HEADER Header; 2988 UINT8 Reserved[6]; 2989 UINT64 BaseAddress; 2990 UINT64 Length; 2991 ACPI_GENERIC_ADDRESS DoorbellRegister; 2992 UINT64 PreserveMask; 2993 UINT64 WriteMask; 2994 UINT32 Latency; 2995 UINT32 MaxAccessRate; 2996 UINT16 MinTurnaroundTime; 2997 2998 } ACPI_PCCT_SUBSPACE; 2999 3000 3001 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 3002 3003 typedef struct acpi_pcct_hw_reduced 3004 { 3005 ACPI_SUBTABLE_HEADER Header; 3006 UINT32 PlatformInterrupt; 3007 UINT8 Flags; 3008 UINT8 Reserved; 3009 UINT64 BaseAddress; 3010 UINT64 Length; 3011 ACPI_GENERIC_ADDRESS DoorbellRegister; 3012 UINT64 PreserveMask; 3013 UINT64 WriteMask; 3014 UINT32 Latency; 3015 UINT32 MaxAccessRate; 3016 UINT16 MinTurnaroundTime; 3017 3018 } ACPI_PCCT_HW_REDUCED; 3019 3020 3021 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 3022 3023 typedef struct acpi_pcct_hw_reduced_type2 3024 { 3025 ACPI_SUBTABLE_HEADER Header; 3026 UINT32 PlatformInterrupt; 3027 UINT8 Flags; 3028 UINT8 Reserved; 3029 UINT64 BaseAddress; 3030 UINT64 Length; 3031 ACPI_GENERIC_ADDRESS DoorbellRegister; 3032 UINT64 PreserveMask; 3033 UINT64 WriteMask; 3034 UINT32 Latency; 3035 UINT32 MaxAccessRate; 3036 UINT16 MinTurnaroundTime; 3037 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3038 UINT64 AckPreserveMask; 3039 UINT64 AckWriteMask; 3040 3041 } ACPI_PCCT_HW_REDUCED_TYPE2; 3042 3043 3044 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 3045 3046 typedef struct acpi_pcct_ext_pcc_master 3047 { 3048 ACPI_SUBTABLE_HEADER Header; 3049 UINT32 PlatformInterrupt; 3050 UINT8 Flags; 3051 UINT8 Reserved1; 3052 UINT64 BaseAddress; 3053 UINT32 Length; 3054 ACPI_GENERIC_ADDRESS DoorbellRegister; 3055 UINT64 PreserveMask; 3056 UINT64 WriteMask; 3057 UINT32 Latency; 3058 UINT32 MaxAccessRate; 3059 UINT32 MinTurnaroundTime; 3060 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3061 UINT64 AckPreserveMask; 3062 UINT64 AckSetMask; 3063 UINT64 Reserved2; 3064 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3065 UINT64 CmdCompleteMask; 3066 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 3067 UINT64 CmdUpdatePreserveMask; 3068 UINT64 CmdUpdateSetMask; 3069 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3070 UINT64 ErrorStatusMask; 3071 3072 } ACPI_PCCT_EXT_PCC_MASTER; 3073 3074 3075 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 3076 3077 typedef struct acpi_pcct_ext_pcc_slave 3078 { 3079 ACPI_SUBTABLE_HEADER Header; 3080 UINT32 PlatformInterrupt; 3081 UINT8 Flags; 3082 UINT8 Reserved1; 3083 UINT64 BaseAddress; 3084 UINT32 Length; 3085 ACPI_GENERIC_ADDRESS DoorbellRegister; 3086 UINT64 PreserveMask; 3087 UINT64 WriteMask; 3088 UINT32 Latency; 3089 UINT32 MaxAccessRate; 3090 UINT32 MinTurnaroundTime; 3091 ACPI_GENERIC_ADDRESS PlatformAckRegister; 3092 UINT64 AckPreserveMask; 3093 UINT64 AckSetMask; 3094 UINT64 Reserved2; 3095 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3096 UINT64 CmdCompleteMask; 3097 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 3098 UINT64 CmdUpdatePreserveMask; 3099 UINT64 CmdUpdateSetMask; 3100 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3101 UINT64 ErrorStatusMask; 3102 3103 } ACPI_PCCT_EXT_PCC_SLAVE; 3104 3105 /* 5: HW Registers based Communications Subspace */ 3106 3107 typedef struct acpi_pcct_hw_reg 3108 { 3109 ACPI_SUBTABLE_HEADER Header; 3110 UINT16 Version; 3111 UINT64 BaseAddress; 3112 UINT64 Length; 3113 ACPI_GENERIC_ADDRESS DoorbellRegister; 3114 UINT64 DoorbellPreserve; 3115 UINT64 DoorbellWrite; 3116 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 3117 UINT64 CmdCompleteMask; 3118 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 3119 UINT64 ErrorStatusMask; 3120 UINT32 NominalLatency; 3121 UINT32 MinTurnaroundTime; 3122 3123 } ACPI_PCCT_HW_REG; 3124 3125 3126 /* Values for doorbell flags above */ 3127 3128 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 3129 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 3130 3131 3132 /* 3133 * PCC memory structures (not part of the ACPI table) 3134 */ 3135 3136 /* Shared Memory Region */ 3137 3138 typedef struct acpi_pcct_shared_memory 3139 { 3140 UINT32 Signature; 3141 UINT16 Command; 3142 UINT16 Status; 3143 3144 } ACPI_PCCT_SHARED_MEMORY; 3145 3146 3147 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 3148 3149 typedef struct acpi_pcct_ext_pcc_shared_memory 3150 { 3151 UINT32 Signature; 3152 UINT32 Flags; 3153 UINT32 Length; 3154 UINT32 Command; 3155 3156 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 3157 3158 3159 /******************************************************************************* 3160 * 3161 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 3162 * Version 0 3163 * 3164 ******************************************************************************/ 3165 3166 typedef struct acpi_table_pdtt 3167 { 3168 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3169 UINT8 TriggerCount; 3170 UINT8 Reserved[3]; 3171 UINT32 ArrayOffset; 3172 3173 } ACPI_TABLE_PDTT; 3174 3175 3176 /* 3177 * PDTT Communication Channel Identifier Structure. 3178 * The number of these structures is defined by TriggerCount above, 3179 * starting at ArrayOffset. 3180 */ 3181 typedef struct acpi_pdtt_channel 3182 { 3183 UINT8 SubchannelId; 3184 UINT8 Flags; 3185 3186 } ACPI_PDTT_CHANNEL; 3187 3188 /* Flags for above */ 3189 3190 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 3191 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 3192 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 3193 3194 3195 /******************************************************************************* 3196 * 3197 * PHAT - Platform Health Assessment Table (ACPI 6.4) 3198 * Version 1 3199 * 3200 ******************************************************************************/ 3201 3202 typedef struct acpi_table_phat 3203 { 3204 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3205 3206 } ACPI_TABLE_PHAT; 3207 3208 /* Common header for PHAT subtables that follow main table */ 3209 3210 typedef struct acpi_phat_header 3211 { 3212 UINT16 Type; 3213 UINT16 Length; 3214 UINT8 Revision; 3215 3216 } ACPI_PHAT_HEADER; 3217 3218 3219 /* Values for Type field above */ 3220 3221 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 3222 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 3223 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 3224 3225 /* 3226 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 3227 */ 3228 3229 /* 0: Firmware Version Data Record */ 3230 3231 typedef struct acpi_phat_version_data 3232 { 3233 ACPI_PHAT_HEADER Header; 3234 UINT8 Reserved[3]; 3235 UINT32 ElementCount; 3236 3237 } ACPI_PHAT_VERSION_DATA; 3238 3239 typedef struct acpi_phat_version_element 3240 { 3241 UINT8 Guid[16]; 3242 UINT64 VersionValue; 3243 UINT32 ProducerId; 3244 3245 } ACPI_PHAT_VERSION_ELEMENT; 3246 3247 3248 /* 1: Firmware Health Data Record */ 3249 3250 typedef struct acpi_phat_health_data 3251 { 3252 ACPI_PHAT_HEADER Header; 3253 UINT8 Reserved[2]; 3254 UINT8 Health; 3255 UINT8 DeviceGuid[16]; 3256 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 3257 3258 } ACPI_PHAT_HEALTH_DATA; 3259 3260 /* Values for Health field above */ 3261 3262 #define ACPI_PHAT_ERRORS_FOUND 0 3263 #define ACPI_PHAT_NO_ERRORS 1 3264 #define ACPI_PHAT_UNKNOWN_ERRORS 2 3265 #define ACPI_PHAT_ADVISORY 3 3266 3267 3268 /******************************************************************************* 3269 * 3270 * PMTT - Platform Memory Topology Table (ACPI 5.0) 3271 * Version 1 3272 * 3273 ******************************************************************************/ 3274 3275 typedef struct acpi_table_pmtt 3276 { 3277 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3278 UINT32 MemoryDeviceCount; 3279 /* 3280 * Immediately followed by: 3281 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3282 */ 3283 3284 } ACPI_TABLE_PMTT; 3285 3286 3287 /* Common header for PMTT subtables that follow main table */ 3288 3289 typedef struct acpi_pmtt_header 3290 { 3291 UINT8 Type; 3292 UINT8 Reserved1; 3293 UINT16 Length; 3294 UINT16 Flags; 3295 UINT16 Reserved2; 3296 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 3297 /* 3298 * Immediately followed by: 3299 * UINT8 TypeSpecificData[] 3300 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3301 */ 3302 3303 } ACPI_PMTT_HEADER; 3304 3305 /* Values for Type field above */ 3306 3307 #define ACPI_PMTT_TYPE_SOCKET 0 3308 #define ACPI_PMTT_TYPE_CONTROLLER 1 3309 #define ACPI_PMTT_TYPE_DIMM 2 3310 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 3311 #define ACPI_PMTT_TYPE_VENDOR 0xFF 3312 3313 /* Values for Flags field above */ 3314 3315 #define ACPI_PMTT_TOP_LEVEL 0x0001 3316 #define ACPI_PMTT_PHYSICAL 0x0002 3317 #define ACPI_PMTT_MEMORY_TYPE 0x000C 3318 3319 3320 /* 3321 * PMTT subtables, correspond to Type in acpi_pmtt_header 3322 */ 3323 3324 3325 /* 0: Socket Structure */ 3326 3327 typedef struct acpi_pmtt_socket 3328 { 3329 ACPI_PMTT_HEADER Header; 3330 UINT16 SocketId; 3331 UINT16 Reserved; 3332 3333 } ACPI_PMTT_SOCKET; 3334 /* 3335 * Immediately followed by: 3336 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3337 */ 3338 3339 3340 /* 1: Memory Controller subtable */ 3341 3342 typedef struct acpi_pmtt_controller 3343 { 3344 ACPI_PMTT_HEADER Header; 3345 UINT16 ControllerId; 3346 UINT16 Reserved; 3347 3348 } ACPI_PMTT_CONTROLLER; 3349 /* 3350 * Immediately followed by: 3351 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3352 */ 3353 3354 3355 /* 2: Physical Component Identifier (DIMM) */ 3356 3357 typedef struct acpi_pmtt_physical_component 3358 { 3359 ACPI_PMTT_HEADER Header; 3360 UINT32 BiosHandle; 3361 3362 } ACPI_PMTT_PHYSICAL_COMPONENT; 3363 3364 3365 /* 0xFF: Vendor Specific Data */ 3366 3367 typedef struct acpi_pmtt_vendor_specific 3368 { 3369 ACPI_PMTT_HEADER Header; 3370 UINT8 TypeUuid[16]; 3371 UINT8 Specific[]; 3372 /* 3373 * Immediately followed by: 3374 * UINT8 VendorSpecificData[]; 3375 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 3376 */ 3377 3378 } ACPI_PMTT_VENDOR_SPECIFIC; 3379 3380 3381 /******************************************************************************* 3382 * 3383 * PPTT - Processor Properties Topology Table (ACPI 6.2) 3384 * Version 1 3385 * 3386 ******************************************************************************/ 3387 3388 typedef struct acpi_table_pptt 3389 { 3390 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3391 3392 } ACPI_TABLE_PPTT; 3393 3394 /* Values for Type field above */ 3395 3396 enum AcpiPpttType 3397 { 3398 ACPI_PPTT_TYPE_PROCESSOR = 0, 3399 ACPI_PPTT_TYPE_CACHE = 1, 3400 ACPI_PPTT_TYPE_ID = 2, 3401 ACPI_PPTT_TYPE_RESERVED = 3 3402 }; 3403 3404 3405 /* 0: Processor Hierarchy Node Structure */ 3406 3407 typedef struct acpi_pptt_processor 3408 { 3409 ACPI_SUBTABLE_HEADER Header; 3410 UINT16 Reserved; 3411 UINT32 Flags; 3412 UINT32 Parent; 3413 UINT32 AcpiProcessorId; 3414 UINT32 NumberOfPrivResources; 3415 3416 } ACPI_PPTT_PROCESSOR; 3417 3418 /* Flags */ 3419 3420 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 3421 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 3422 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 3423 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 3424 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 3425 3426 3427 /* 1: Cache Type Structure */ 3428 3429 typedef struct acpi_pptt_cache 3430 { 3431 ACPI_SUBTABLE_HEADER Header; 3432 UINT16 Reserved; 3433 UINT32 Flags; 3434 UINT32 NextLevelOfCache; 3435 UINT32 Size; 3436 UINT32 NumberOfSets; 3437 UINT8 Associativity; 3438 UINT8 Attributes; 3439 UINT16 LineSize; 3440 3441 } ACPI_PPTT_CACHE; 3442 3443 /* 1: Cache Type Structure for PPTT version 3 */ 3444 3445 typedef struct acpi_pptt_cache_v1 3446 { 3447 ACPI_SUBTABLE_HEADER Header; 3448 UINT16 Reserved; 3449 UINT32 Flags; 3450 UINT32 NextLevelOfCache; 3451 UINT32 Size; 3452 UINT32 NumberOfSets; 3453 UINT8 Associativity; 3454 UINT8 Attributes; 3455 UINT16 LineSize; 3456 UINT32 CacheId; 3457 3458 } ACPI_PPTT_CACHE_V1; 3459 3460 3461 /* Flags */ 3462 3463 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 3464 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 3465 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 3466 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 3467 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 3468 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 3469 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 3470 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 3471 3472 /* Masks for Attributes */ 3473 3474 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3475 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3476 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3477 3478 /* Attributes describing cache */ 3479 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3480 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3481 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3482 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3483 3484 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3485 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3486 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3487 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3488 3489 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3490 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3491 3492 /* 2: ID Structure */ 3493 3494 typedef struct acpi_pptt_id 3495 { 3496 ACPI_SUBTABLE_HEADER Header; 3497 UINT16 Reserved; 3498 UINT32 VendorId; 3499 UINT64 Level1Id; 3500 UINT64 Level2Id; 3501 UINT16 MajorRev; 3502 UINT16 MinorRev; 3503 UINT16 SpinRev; 3504 3505 } ACPI_PPTT_ID; 3506 3507 3508 /******************************************************************************* 3509 * 3510 * PRMT - Platform Runtime Mechanism Table 3511 * Version 1 3512 * 3513 ******************************************************************************/ 3514 3515 typedef struct acpi_table_prmt 3516 { 3517 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3518 3519 } ACPI_TABLE_PRMT; 3520 3521 typedef struct acpi_table_prmt_header 3522 { 3523 UINT8 PlatformGuid[16]; 3524 UINT32 ModuleInfoOffset; 3525 UINT32 ModuleInfoCount; 3526 3527 } ACPI_TABLE_PRMT_HEADER; 3528 3529 typedef struct acpi_prmt_module_header 3530 { 3531 UINT16 Revision; 3532 UINT16 Length; 3533 3534 } ACPI_PRMT_MODULE_HEADER; 3535 3536 typedef struct acpi_prmt_module_info 3537 { 3538 UINT16 Revision; 3539 UINT16 Length; 3540 UINT8 ModuleGuid[16]; 3541 UINT16 MajorRev; 3542 UINT16 MinorRev; 3543 UINT16 HandlerInfoCount; 3544 UINT32 HandlerInfoOffset; 3545 UINT64 MmioListPointer; 3546 3547 } ACPI_PRMT_MODULE_INFO; 3548 3549 typedef struct acpi_prmt_handler_info 3550 { 3551 UINT16 Revision; 3552 UINT16 Length; 3553 UINT8 HandlerGuid[16]; 3554 UINT64 HandlerAddress; 3555 UINT64 StaticDataBufferAddress; 3556 UINT64 AcpiParamBufferAddress; 3557 3558 } ACPI_PRMT_HANDLER_INFO; 3559 3560 3561 /******************************************************************************* 3562 * 3563 * RASF - RAS Feature Table (ACPI 5.0) 3564 * Version 1 3565 * 3566 ******************************************************************************/ 3567 3568 typedef struct acpi_table_rasf 3569 { 3570 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3571 UINT8 ChannelId[12]; 3572 3573 } ACPI_TABLE_RASF; 3574 3575 /* RASF Platform Communication Channel Shared Memory Region */ 3576 3577 typedef struct acpi_rasf_shared_memory 3578 { 3579 UINT32 Signature; 3580 UINT16 Command; 3581 UINT16 Status; 3582 UINT16 Version; 3583 UINT8 Capabilities[16]; 3584 UINT8 SetCapabilities[16]; 3585 UINT16 NumParameterBlocks; 3586 UINT32 SetCapabilitiesStatus; 3587 3588 } ACPI_RASF_SHARED_MEMORY; 3589 3590 /* RASF Parameter Block Structure Header */ 3591 3592 typedef struct acpi_rasf_parameter_block 3593 { 3594 UINT16 Type; 3595 UINT16 Version; 3596 UINT16 Length; 3597 3598 } ACPI_RASF_PARAMETER_BLOCK; 3599 3600 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3601 3602 typedef struct acpi_rasf_patrol_scrub_parameter 3603 { 3604 ACPI_RASF_PARAMETER_BLOCK Header; 3605 UINT16 PatrolScrubCommand; 3606 UINT64 RequestedAddressRange[2]; 3607 UINT64 ActualAddressRange[2]; 3608 UINT16 Flags; 3609 UINT8 RequestedSpeed; 3610 3611 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3612 3613 /* Masks for Flags and Speed fields above */ 3614 3615 #define ACPI_RASF_SCRUBBER_RUNNING 1 3616 #define ACPI_RASF_SPEED (7<<1) 3617 #define ACPI_RASF_SPEED_SLOW (0<<1) 3618 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3619 #define ACPI_RASF_SPEED_FAST (7<<1) 3620 3621 /* Channel Commands */ 3622 3623 enum AcpiRasfCommands 3624 { 3625 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3626 }; 3627 3628 /* Platform RAS Capabilities */ 3629 3630 enum AcpiRasfCapabiliities 3631 { 3632 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3633 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3634 }; 3635 3636 /* Patrol Scrub Commands */ 3637 3638 enum AcpiRasfPatrolScrubCommands 3639 { 3640 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3641 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3642 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3643 }; 3644 3645 /* Channel Command flags */ 3646 3647 #define ACPI_RASF_GENERATE_SCI (1<<15) 3648 3649 /* Status values */ 3650 3651 enum AcpiRasfStatus 3652 { 3653 ACPI_RASF_SUCCESS = 0, 3654 ACPI_RASF_NOT_VALID = 1, 3655 ACPI_RASF_NOT_SUPPORTED = 2, 3656 ACPI_RASF_BUSY = 3, 3657 ACPI_RASF_FAILED = 4, 3658 ACPI_RASF_ABORTED = 5, 3659 ACPI_RASF_INVALID_DATA = 6 3660 }; 3661 3662 /* Status flags */ 3663 3664 #define ACPI_RASF_COMMAND_COMPLETE (1) 3665 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3666 #define ACPI_RASF_ERROR (1<<2) 3667 #define ACPI_RASF_STATUS (0x1F<<3) 3668 3669 3670 /******************************************************************************* 3671 * 3672 * RAS2 - RAS2 Feature Table (ACPI 6.5) 3673 * Version 1 3674 * 3675 * 3676 ******************************************************************************/ 3677 3678 typedef struct acpi_table_ras2 { 3679 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3680 UINT16 Reserved; 3681 UINT16 NumPccDescs; 3682 3683 } ACPI_TABLE_RAS2; 3684 3685 /* RAS2 Platform Communication Channel Descriptor */ 3686 3687 typedef struct acpi_ras2_pcc_desc { 3688 UINT8 ChannelId; 3689 UINT16 Reserved; 3690 UINT8 FeatureType; 3691 UINT32 Instance; 3692 3693 } ACPI_RAS2_PCC_DESC; 3694 3695 /* RAS2 Platform Communication Channel Shared Memory Region */ 3696 3697 typedef struct acpi_ras2_shmem { 3698 UINT32 Signature; 3699 UINT16 Command; 3700 UINT16 Status; 3701 UINT16 Version; 3702 UINT8 Features[16]; 3703 UINT8 SetCaps[16]; 3704 UINT16 NumParamBlks; 3705 UINT32 SetCapsStatus; 3706 3707 } ACPI_RAS2_SHMEM; 3708 3709 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3710 3711 typedef struct acpi_ras2_parameter_block 3712 { 3713 UINT16 Type; 3714 UINT16 Version; 3715 UINT16 Length; 3716 3717 } ACPI_RAS2_PARAMETER_BLOCK; 3718 3719 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3720 3721 typedef struct acpi_ras2_patrol_scrub_param { 3722 ACPI_RAS2_PARAMETER_BLOCK Header; 3723 UINT16 Command; 3724 UINT64 ReqAddrRange[2]; 3725 UINT64 ActlAddrRange[2]; 3726 UINT32 Flags; 3727 UINT32 ScrubParamsOut; 3728 UINT32 ScrubParamsIn; 3729 UINT32 ExtScrubParams; 3730 UINT8 ScrubRateDesc[256]; 3731 3732 } ACPI_RAS2_PATROL_SCRUB_PARAM; 3733 3734 /* Masks for Flags field above */ 3735 3736 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3737 3738 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3739 3740 typedef struct acpi_ras2_la2pa_translation_parameter { 3741 ACPI_RAS2_PARAMETER_BLOCK Header; 3742 UINT16 AddrTranslationCommand; 3743 UINT64 SubInstId; 3744 UINT64 LogicalAddress; 3745 UINT64 PhysicalAddress; 3746 UINT32 Status; 3747 3748 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3749 3750 /* Channel Commands */ 3751 3752 enum AcpiRas2Commands 3753 { 3754 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3755 }; 3756 3757 /* Platform RAS2 Features */ 3758 3759 enum AcpiRas2Features 3760 { 3761 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3762 ACPI_RAS2_LA2PA_TRANSLATION = 1 3763 }; 3764 3765 /* RAS2 Patrol Scrub Commands */ 3766 3767 enum AcpiRas2PatrolScrubCommands 3768 { 3769 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3770 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3771 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3772 }; 3773 3774 /* RAS2 LA2PA Translation Commands */ 3775 3776 enum AcpiRas2La2PaTranslationCommands 3777 { 3778 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3779 }; 3780 3781 /* RAS2 LA2PA Translation Status values */ 3782 3783 enum AcpiRas2La2PaTranslationStatus 3784 { 3785 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3786 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3787 }; 3788 3789 /* Channel Command flags */ 3790 3791 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3792 3793 /* Status values */ 3794 3795 enum AcpiRas2Status 3796 { 3797 ACPI_RAS2_SUCCESS = 0, 3798 ACPI_RAS2_NOT_VALID = 1, 3799 ACPI_RAS2_NOT_SUPPORTED = 2, 3800 ACPI_RAS2_BUSY = 3, 3801 ACPI_RAS2_FAILED = 4, 3802 ACPI_RAS2_ABORTED = 5, 3803 ACPI_RAS2_INVALID_DATA = 6 3804 }; 3805 3806 /* Status flags */ 3807 3808 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3809 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3810 #define ACPI_RAS2_ERROR (1<<2) 3811 #define ACPI_RAS2_STATUS (0x1F<<3) 3812 3813 3814 /******************************************************************************* 3815 * 3816 * RGRT - Regulatory Graphics Resource Table 3817 * Version 1 3818 * 3819 * Conforms to "ACPI RGRT" available at: 3820 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3821 * 3822 ******************************************************************************/ 3823 3824 typedef struct acpi_table_rgrt 3825 { 3826 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3827 UINT16 Version; 3828 UINT8 ImageType; 3829 UINT8 Reserved; 3830 UINT8 Image[]; 3831 3832 } ACPI_TABLE_RGRT; 3833 3834 /* ImageType values */ 3835 3836 enum AcpiRgrtImageType 3837 { 3838 ACPI_RGRT_TYPE_RESERVED0 = 0, 3839 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3840 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3841 }; 3842 3843 3844 /******************************************************************************* 3845 * 3846 * RHCT - RISC-V Hart Capabilities Table 3847 * Version 1 3848 * 3849 ******************************************************************************/ 3850 3851 typedef struct acpi_table_rhct { 3852 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3853 UINT32 Flags; /* RHCT flags */ 3854 UINT64 TimeBaseFreq; 3855 UINT32 NodeCount; 3856 UINT32 NodeOffset; 3857 } ACPI_TABLE_RHCT; 3858 3859 /* RHCT Flags */ 3860 3861 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3862 /* 3863 * RHCT subtables 3864 */ 3865 typedef struct acpi_rhct_node_header { 3866 UINT16 Type; 3867 UINT16 Length; 3868 UINT16 Revision; 3869 } ACPI_RHCT_NODE_HEADER; 3870 3871 /* Values for RHCT subtable Type above */ 3872 3873 enum acpi_rhct_node_type { 3874 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3875 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3876 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3877 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3878 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3879 }; 3880 3881 /* 3882 * RHCT node specific subtables 3883 */ 3884 3885 /* ISA string node structure */ 3886 typedef struct acpi_rhct_isa_string { 3887 UINT16 IsaLength; 3888 char Isa[]; 3889 } ACPI_RHCT_ISA_STRING; 3890 3891 typedef struct acpi_rhct_cmo_node { 3892 UINT8 Reserved; /* Must be zero */ 3893 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3894 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3895 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3896 } ACPI_RHCT_CMO_NODE; 3897 3898 typedef struct acpi_rhct_mmu_node { 3899 UINT8 Reserved; /* Must be zero */ 3900 UINT8 MmuType; /* Virtual Address Scheme */ 3901 } ACPI_RHCT_MMU_NODE; 3902 3903 enum acpi_rhct_mmu_type { 3904 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3905 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3906 ACPI_RHCT_MMU_TYPE_SV57 = 2 3907 }; 3908 3909 /* Hart Info node structure */ 3910 typedef struct acpi_rhct_hart_info { 3911 UINT16 NumOffsets; 3912 UINT32 Uid; /* ACPI processor UID */ 3913 } ACPI_RHCT_HART_INFO; 3914 3915 /******************************************************************************* 3916 * 3917 * RIMT - RISC-V IO Remapping Table 3918 * 3919 * https://github.com/riscv-non-isa/riscv-acpi-rimt 3920 * 3921 ******************************************************************************/ 3922 3923 typedef struct acpi_table_rimt { 3924 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3925 UINT32 NumNodes; /* Number of RIMT Nodes */ 3926 UINT32 NodeOffset; /* Offset to RIMT Node Array */ 3927 UINT32 Reserved; 3928 } ACPI_TABLE_RIMT; 3929 3930 typedef struct acpi_rimt_node { 3931 UINT8 Type; 3932 UINT8 Revision; 3933 UINT16 Length; 3934 UINT16 Reserved; 3935 UINT16 Id; 3936 char NodeData[]; 3937 } ACPI_RIMT_NODE; 3938 3939 enum acpi_rimt_node_type { 3940 ACPI_RIMT_NODE_TYPE_IOMMU = 0x0, 3941 ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1, 3942 ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2, 3943 }; 3944 3945 typedef struct acpi_rimt_iommu { 3946 UINT8 HardwareId[8]; /* Hardware ID */ 3947 UINT64 BaseAddress; /* Base Address */ 3948 UINT32 Flags; /* Flags */ 3949 UINT32 ProximityDomain; /* Proximity Domain */ 3950 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 3951 UINT16 PcieBdf; /* PCIe B/D/F */ 3952 UINT16 NumInterruptWires; /* Number of interrupt wires */ 3953 UINT16 InterruptWireOffset; /* Interrupt wire array offset */ 3954 UINT64 InterruptWire[]; /* Interrupt wire array */ 3955 } ACPI_RIMT_IOMMU; 3956 3957 /* IOMMU Node Flags */ 3958 #define ACPI_RIMT_IOMMU_FLAGS_PCIE (1) 3959 #define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1) 3960 3961 /* Interrupt Wire Structure */ 3962 typedef struct acpi_rimt_iommu_wire_gsi { 3963 UINT32 IrqNum; /* Interrupt Number */ 3964 UINT32 Flags; /* Flags */ 3965 } ACPI_RIMT_IOMMU_WIRE_GSI; 3966 3967 /* Interrupt Wire Flags */ 3968 #define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1) 3969 #define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1) 3970 3971 typedef struct acpi_rimt_id_mapping { 3972 UINT32 SourceIdBase; /* Source ID Base */ 3973 UINT32 NumIds; /* Number of IDs */ 3974 UINT32 DestIdBase; /* Destination Device ID Base */ 3975 UINT32 DestOffset; /* Destination IOMMU Offset */ 3976 UINT32 Flags; /* Flags */ 3977 } ACPI_RIMT_ID_MAPPING; 3978 3979 typedef struct acpi_rimt_pcie_rc { 3980 UINT32 Flags; /* Flags */ 3981 UINT16 Reserved; /* Reserved */ 3982 UINT16 PcieSegmentNumber; /* PCIe Segment number */ 3983 UINT16 IdMappingOffset; /* ID mapping array offset */ 3984 UINT16 NumIdMappings; /* Number of ID mappings */ 3985 } ACPI_RIMT_PCIE_RC; 3986 3987 /* PCIe Root Complex Node Flags */ 3988 #define ACPI_RIMT_PCIE_ATS_SUPPORTED (1) 3989 #define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1) 3990 3991 typedef struct acpi_rimt_platform_device { 3992 UINT16 IdMappingOffset; /* ID Mapping array offset */ 3993 UINT16 NumIdMappings; /* Number of ID mappings */ 3994 char DeviceName[]; /* Device Object Name */ 3995 } ACPI_RIMT_PLATFORM_DEVICE; 3996 3997 3998 /******************************************************************************* 3999 * 4000 * SBST - Smart Battery Specification Table 4001 * Version 1 4002 * 4003 ******************************************************************************/ 4004 4005 typedef struct acpi_table_sbst 4006 { 4007 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4008 UINT32 WarningLevel; 4009 UINT32 LowLevel; 4010 UINT32 CriticalLevel; 4011 4012 } ACPI_TABLE_SBST; 4013 4014 4015 /******************************************************************************* 4016 * 4017 * SDEI - Software Delegated Exception Interface Descriptor Table 4018 * 4019 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 4020 * May 8th, 2017. Copyright 2017 ARM Ltd. 4021 * 4022 ******************************************************************************/ 4023 4024 typedef struct acpi_table_sdei 4025 { 4026 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4027 4028 } ACPI_TABLE_SDEI; 4029 4030 4031 /******************************************************************************* 4032 * 4033 * SDEV - Secure Devices Table (ACPI 6.2) 4034 * Version 1 4035 * 4036 ******************************************************************************/ 4037 4038 typedef struct acpi_table_sdev 4039 { 4040 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4041 4042 } ACPI_TABLE_SDEV; 4043 4044 4045 typedef struct acpi_sdev_header 4046 { 4047 UINT8 Type; 4048 UINT8 Flags; 4049 UINT16 Length; 4050 4051 } ACPI_SDEV_HEADER; 4052 4053 4054 /* Values for subtable type above */ 4055 4056 enum AcpiSdevType 4057 { 4058 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 4059 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 4060 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 4061 }; 4062 4063 /* Values for flags above */ 4064 4065 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 4066 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 4067 4068 /* 4069 * SDEV subtables 4070 */ 4071 4072 /* 0: Namespace Device Based Secure Device Structure */ 4073 4074 typedef struct acpi_sdev_namespace 4075 { 4076 ACPI_SDEV_HEADER Header; 4077 UINT16 DeviceIdOffset; 4078 UINT16 DeviceIdLength; 4079 UINT16 VendorDataOffset; 4080 UINT16 VendorDataLength; 4081 4082 } ACPI_SDEV_NAMESPACE; 4083 4084 typedef struct acpi_sdev_secure_component 4085 { 4086 UINT16 SecureComponentOffset; 4087 UINT16 SecureComponentLength; 4088 4089 } ACPI_SDEV_SECURE_COMPONENT; 4090 4091 4092 /* 4093 * SDEV sub-subtables ("Components") for above 4094 */ 4095 typedef struct acpi_sdev_component 4096 { 4097 ACPI_SDEV_HEADER Header; 4098 4099 } ACPI_SDEV_COMPONENT; 4100 4101 4102 /* Values for sub-subtable type above */ 4103 4104 enum AcpiSacType 4105 { 4106 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 4107 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 4108 }; 4109 4110 typedef struct acpi_sdev_id_component 4111 { 4112 ACPI_SDEV_HEADER Header; 4113 UINT16 HardwareIdOffset; 4114 UINT16 HardwareIdLength; 4115 UINT16 SubsystemIdOffset; 4116 UINT16 SubsystemIdLength; 4117 UINT16 HardwareRevision; 4118 UINT8 HardwareRevPresent; 4119 UINT8 ClassCodePresent; 4120 UINT8 PciBaseClass; 4121 UINT8 PciSubClass; 4122 UINT8 PciProgrammingXface; 4123 4124 } ACPI_SDEV_ID_COMPONENT; 4125 4126 typedef struct acpi_sdev_mem_component 4127 { 4128 ACPI_SDEV_HEADER Header; 4129 UINT32 Reserved; 4130 UINT64 MemoryBaseAddress; 4131 UINT64 MemoryLength; 4132 4133 } ACPI_SDEV_MEM_COMPONENT; 4134 4135 4136 /* 1: PCIe Endpoint Device Based Device Structure */ 4137 4138 typedef struct acpi_sdev_pcie 4139 { 4140 ACPI_SDEV_HEADER Header; 4141 UINT16 Segment; 4142 UINT16 StartBus; 4143 UINT16 PathOffset; 4144 UINT16 PathLength; 4145 UINT16 VendorDataOffset; 4146 UINT16 VendorDataLength; 4147 4148 } ACPI_SDEV_PCIE; 4149 4150 /* 1a: PCIe Endpoint path entry */ 4151 4152 typedef struct acpi_sdev_pcie_path 4153 { 4154 UINT8 Device; 4155 UINT8 Function; 4156 4157 } ACPI_SDEV_PCIE_PATH; 4158 4159 4160 /******************************************************************************* 4161 * 4162 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 4163 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4164 * Trust Domain Extensions (Intel TDX)". 4165 * Version 1 4166 * 4167 ******************************************************************************/ 4168 4169 typedef struct acpi_table_svkl 4170 { 4171 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4172 UINT32 Count; 4173 4174 } ACPI_TABLE_SVKL; 4175 4176 typedef struct acpi_svkl_key 4177 { 4178 UINT16 Type; 4179 UINT16 Format; 4180 UINT32 Size; 4181 UINT64 Address; 4182 4183 } ACPI_SVKL_KEY; 4184 4185 enum acpi_svkl_type 4186 { 4187 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 4188 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 4189 }; 4190 4191 enum acpi_svkl_format 4192 { 4193 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 4194 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 4195 }; 4196 4197 /******************************************************************************* 4198 * 4199 * SWFT - SoundWire File Table 4200 * as described in Discovery and Configuration (DisCo) Specification 4201 * for SoundWire 4202 * Version 1 4203 * 4204 ******************************************************************************/ 4205 4206 typedef struct acpi_table_swft 4207 { 4208 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4209 4210 } ACPI_TABLE_SWFT; 4211 4212 typedef struct acpi_swft_file 4213 { 4214 UINT16 VendorID; 4215 UINT32 FileID; 4216 UINT16 FileVersion; 4217 UINT32 FileLength; 4218 UINT8 FileData[]; 4219 } ACPI_SWFT_FILE; 4220 4221 /******************************************************************************* 4222 * 4223 * TDEL - TD-Event Log 4224 * From: "Guest-Host-Communication Interface (GHCI) for Intel 4225 * Trust Domain Extensions (Intel TDX)". 4226 * September 2020 4227 * 4228 ******************************************************************************/ 4229 4230 typedef struct acpi_table_tdel 4231 { 4232 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 4233 UINT32 Reserved; 4234 UINT64 LogAreaMinimumLength; 4235 UINT64 LogAreaStartAddress; 4236 4237 } ACPI_TABLE_TDEL; 4238 4239 /* Reset to default packing */ 4240 4241 #pragma pack() 4242 4243 #endif /* __ACTBL2_H__ */ 4244
Indexes created Sat Feb 21 16:20:20 UTC 2026