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    Searched refs:ADRP (Results 1 - 11 of 11) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64MacroFusion.cpp 166 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::ADRP) &&
227 case AArch64::ADRP:
AArch64CollectLOH.cpp 19 // L1: adrp xA, sym@PAGE
28 // L1: adrp xA, sym@PAGE
39 // respectively ADRP, ADD (immediate), and LD.
45 // - The ADRP in L1 and the ADD in L2 must reference the same symbol using
49 // * So called non-ADRP-related:
51 // L1: adrp xA, sym@PAGE
55 // L1: adrp xA, sym@GOTPAGE
59 // L1: adrp xA, sym@PAGE
62 // L1: adrp xA, sym@PAGE
66 // L1: adrp xA, sym@GOTPAG
    [all...]
AArch64ExpandPseudoInsts.cpp 920 // Small codemodel expand into ADRP + LDR.
924 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg);
970 // largest addend (and hence offset within a function) allowed for ADRP is
980 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)
998 // Expand into ADRP + ADD.
1001 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)
AArch64AsmPrinter.cpp 546 MCInstBuilder(AArch64::ADRP)
1282 /// adrp x0, :tlsdesc:var
1297 MCInst Adrp;
1298 Adrp.setOpcode(AArch64::ADRP);
1299 Adrp.addOperand(MCOperand::createReg(AArch64::X0));
1300 Adrp.addOperand(SymTLSDesc);
1301 EmitToStreamer(*OutStreamer, Adrp);
AArch64ISelLowering.h 61 ADRP, // Page address of a TargetGlobalAddress operand.
AArch64FastISel.cpp 431 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
462 // ADRP + LDRX
463 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
494 // ADRP + ADDX
495 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
3220 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
AArch64InstrInfo.cpp 1895 BuildMI(MBB, FirstEpilogSEH, DL, TII->get(AArch64::ADRP))
2017 BuildMI(MBB, MI, DL, get(AArch64::ADRP), Reg)
6998 if (MI.getOpcode() == AArch64::ADRP)
AArch64ISelLowering.cpp 1825 MAKE_CASE(AArch64ISD::ADRP)
6148 // (addlow (adrp %hi(sym)) %lo(sym))
6158 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, Ty, Hi);
6159 return DAG.getNode(AArch64ISD::ADDlow, DL, Ty, ADRP, Lo);
6223 /// adrp x0, _var@TLVPPAGE
6376 /// have a descriptor, accessible via a PC-relative ADRP, and whose first entry
6380 /// adrp x0, :tlsdesc:var
6520 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, TLSIndexHi)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64LegalizerInfo.cpp 852 // We do this custom legalization to convert G_GLOBAL_VALUE into target ADRP +
869 auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {})
872 MRI.setRegClass(ADRP.getReg(0), &AArch64::GPR64RegClass);
890 ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP})
894 MRI.setRegClass(ADRP.getReg(0), &AArch64::GPR64RegClass);
897 MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP})
AArch64InstructionSelector.cpp 2285 // This op may have been separated from it's ADRP companion by the localizer
2288 // which will later be expanded into an ADRP+ADD pair after scheduling.
2290 if (BaseMI->getOpcode() != AArch64::ADRP) {
3303 // We generate a MOVaddrJT which will get expanded to an ADRP + ADD later.
4019 auto Adrp =
4020 MIRBuilder.buildInstr(AArch64::ADRP, {&AArch64::GPR64RegClass}, {})
4030 .buildInstr(AArch64::LDRQui, {&AArch64::FPR128RegClass}, {Adrp})
4037 .buildInstr(AArch64::LDRDui, {&AArch64::FPR64RegClass}, {Adrp})
4044 .buildInstr(AArch64::LDRSui, {&AArch64::FPR32RegClass}, {Adrp})
4056 constrainSelectedInstRegOperands(*Adrp, TII, TRI, RBI)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/
AArch64ExternalSymbolizer.cpp 55 /// tested and for ADRP an other instructions that help to load of pointers
92 } else if (MI.getOpcode() == AArch64::ADRP) {
94 // otool expects the fully encoded ADRP instruction to be passed in as

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