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    Searched refs:AFMT_AUDIO_PACKET_CONTROL2 (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 64 SRI(AFMT_AUDIO_PACKET_CONTROL2, DIG, id), \
174 SE_SF(AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, mask_sh),\
178 SE_SF(AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_LAYOUT_OVRD, mask_sh),\
179 SE_SF(AFMT_AUDIO_PACKET_CONTROL2, AFMT_60958_OSF_OVRD, mask_sh),\
654 uint32_t AFMT_AUDIO_PACKET_CONTROL2;
amdgpu_dce_stream_encoder.c 1359 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, channels);
1383 /* AFMT_AUDIO_PACKET_CONTROL2 */
1384 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
1469 /* AFMT_AUDIO_PACKET_CONTROL2 */
1471 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_stream_encoder.c 1297 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, channels);
1315 /* AFMT_AUDIO_PACKET_CONTROL2 */
1316 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
1405 /* AFMT_AUDIO_PACKET_CONTROL2 */
1407 REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
dcn10_stream_encoder.h 51 SRI(AFMT_AUDIO_PACKET_CONTROL2, DIG, id), \
120 uint32_t AFMT_AUDIO_PACKET_CONTROL2;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_evergreen_hdmi.c 381 WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset,
rv770d.h 729 #define AFMT_AUDIO_PACKET_CONTROL2 0x742c
evergreend.h 581 #define AFMT_AUDIO_PACKET_CONTROL2 0x705c
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v6_0.c 1557 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, 0xff);

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