Searched refs:AGILEX5_L4_MP_CLK (Results 1 - 2 of 2) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dintel,agilex5-clkmgr.h58 #define AGILEX5_L4_MP_CLK 40 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex5.dtsi211 clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
221 clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
270 <&clkmgr AGILEX5_L4_MP_CLK>;
287 <&clkmgr AGILEX5_L4_MP_CLK>;

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