| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_cik.c | 2406 tile[6] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2410 tile[7] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2427 tile[12] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2442 tile[17] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2457 tile[30] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2549 tile[6] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2553 tile[7] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2570 tile[12] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2585 tile[17] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2600 tile[30] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
[all...] |
| cikd.h | 1226 # define ARRAY_PRT_2D_TILED_THIN1 6
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/ |
| bif_5_1_enum.h | 532 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| bif_5_0_enum.h | 42 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/ |
| gmc_8_2_enum.h | 532 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| gmc_8_1_enum.h | 42 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/ |
| smu_8_0_enum.h | 532 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| smu_7_1_0_enum.h | 85 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| smu_7_1_1_enum.h | 92 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| smu_7_1_2_enum.h | 92 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| smu_7_1_3_enum.h | 89 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/ |
| uvd_6_0_enum.h | 545 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| uvd_5_0_enum.h | 55 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/ |
| dce_8_0_enum.h | 42 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| dce_10_0_enum.h | 617 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| dce_11_0_enum.h | 5104 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| dce_11_2_enum.h | 5116 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/ |
| oss_2_4_enum.h | 227 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| oss_3_0_1_enum.h | 928 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| oss_3_0_enum.h | 341 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gfx_v7_0.c | 1275 tile[12] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
| gfx_7_2_enum.h | 5168 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| gfx_8_0_enum.h | 5702 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| gfx_8_1_enum.h | 6261 ARRAY_PRT_2D_TILED_THIN1 = 0x6,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| navi10_enum.h | 20257 ARRAY_PRT_2D_TILED_THIN1 = 0x00000006,
|
