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    Searched refs:AR_IMR_S0_QCU_TXDESC (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/isc/atheros_hal/dist/ar5211/
ar5211_xmit.c 184 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC)
ar5211reg.h 447 #define AR_IMR_S0_QCU_TXDESC 0x03FF0000 /* Mask for TXDESC (QCU 0-9) */
ar5211_reset.c 501 (AR_IMR_S0_QCU_TXDESC & (AR_QCU_0<<AR_IMR_S0_QCU_TXDESC_S)));
  /src/sys/external/isc/atheros_hal/dist/ar5212/
ar5212reg.h 516 #define AR_IMR_S0_QCU_TXDESC 0x03FF0000 /* TXDESC (QCU 0-9) */
ar5212_xmit.c 216 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC)
  /src/sys/dev/ic/
athnreg.h 505 #define AR_IMR_S0_QCU_TXDESC(qid) (1 << (16 + (qid)))

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