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Searched refs:AR_INTR_ASYNC_ENABLE (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/isc/atheros_hal/dist/ar5416/
ar5416_gpio.c	`170 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), 172 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, 209 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), 211 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE,`
ar5416_interrupts.c	`188 OS_REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, 0); 189 (void) OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE); 259 OS_REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, AR_INTR_MAC_IRQ);`
ar5416reg.h	`43 #define AR_INTR_ASYNC_ENABLE 0x403c /* enable interrupts */`
/src/sys/dev/ic/
athnreg.h	`111 #define AR_INTR_ASYNC_ENABLE 0x403c`
athn.c	`2130 AR_WRITE(sc, AR_INTR_ASYNC_ENABLE, AR_INTR_MAC_IRQ); 2145 AR_WRITE(sc, AR_INTR_ASYNC_ENABLE, 0); 2146 (void)AR_READ(sc, AR_INTR_ASYNC_ENABLE);`

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