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Searched refs:AR_MIBC (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/isc/atheros_hal/dist/ar5210/
ar5210reg.h	`46 #define AR_MIBC 0x0040 /* MIB control register */`
ar5210_reset.c	`179 OS_REG_WRITE(ah, AR_MIBC, 0); /* unfreeze ctrs + clr state */`
/src/sys/external/isc/atheros_hal/dist/ar5212/
ar5212_misc.c	`363 OS_REG_WRITE(ah, AR_MIBC, 370 OS_REG_WRITE(ah, AR_MIBC, AR_MIBC \| AR_MIBC_CMC);`
ar5212_ani.c	`699 __func__, OS_REG_READ(ah, AR_MIBC),`
ar5212reg.h	`36 #define AR_MIBC 0x0040 /* MAC MIB control register */`
/src/sys/dev/ic/
athn.c	`506 AR_WRITE(sc, AR_MIBC, 0); 967 AR_WRITE(sc, AR_MIBC, AR_MIBC_FMC); 968 AR_WRITE(sc, AR_MIBC, AR_MIBC_CMC); 2977 AR_WRITE(sc, AR_MIBC, AR_MIBC_FMC); 2978 AR_WRITE(sc, AR_MIBC, AR_MIBC_CMC);`
athnreg.h	`37 #define AR_MIBC 0x0040 327 /* Bits for AR_MIBC. */`
/src/sys/external/isc/atheros_hal/dist/ar5211/
ar5211reg.h	`41 #define AR_MIBC 0x0040 /* MIB control register */`
/src/sys/external/isc/atheros_hal/dist/ar5416/
ar5416_ani.c	`619 __func__, OS_REG_READ(ah, AR_MIBC),`

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