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    Searched refs:AR_PHY_PLL_CTL_40 (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/isc/atheros_hal/dist/ar5211/
ar5211phy.h 46 #define AR_PHY_PLL_CTL_40 0x18 /* 40 MHz */
ar5211_reset.c 622 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_40);
637 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_40);
  /src/sys/external/isc/atheros_hal/dist/ar5212/
ar5212phy.h 141 #define AR_PHY_PLL_CTL_40 0xaa /* 40 MHz */
ar5212_reset.c 912 phyPLL = AR_PHY_PLL_CTL_40;
  /src/sys/external/isc/atheros_hal/dist/ar5312/
ar5312_reset.c 712 phyPLL = AR_PHY_PLL_CTL_40;

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