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    Searched refs:ASX0_TX_CLK_SET0_OFFSET (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/mips/cavium/dev/
octeon_asx.c	110 _ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, tx_setting);
octeon_asxreg.h	66 #define ASX0_TX_CLK_SET0_OFFSET 0x0048

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