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    Searched refs:ATOMIC_LOAD_SUB (Results 1 - 15 of 15) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1127 ATOMIC_LOAD_SUB,
SelectionDAGNodes.h 1370 N->getOpcode() == ISD::ATOMIC_LOAD_SUB ||
1427 N->getOpcode() == ISD::ATOMIC_LOAD_SUB ||
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
SelectionDAG.cpp 717 case ISD::ATOMIC_LOAD_SUB:
3547 case ISD::ATOMIC_LOAD_SUB:
4151 case ISD::ATOMIC_LOAD_SUB:
7072 Opcode == ISD::ATOMIC_LOAD_SUB ||
LegalizeIntegerTypes.cpp 190 case ISD::ATOMIC_LOAD_SUB:
2108 case ISD::ATOMIC_LOAD_SUB:
LegalizeDAG.cpp 3886 case ISD::ATOMIC_LOAD_SUB:
SelectionDAGBuilder.cpp 4610 case AtomicRMWInst::Sub: NT = ISD::ATOMIC_LOAD_SUB; break;
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
Mips16ISelLowering.cpp 134 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 571 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_SUB, SYNC_FETCH_AND_SUB)
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelLowering.cpp 265 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 194 // Lower ATOMIC_LOAD_SUB into ATOMIC_LOAD_ADD if LAA and LAAG are
196 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
239 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Custom);
3965 // Op is an ATOMIC_LOAD_SUB operation. Lower 8- and 16-bit operations
5435 case ISD::ATOMIC_LOAD_SUB:
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 504 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 721 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Custom);
722 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i64, Custom);
4652 case ISD::ATOMIC_LOAD_SUB:
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIISelLowering.cpp 835 setTargetDAGCombine(ISD::ATOMIC_LOAD_SUB);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 1315 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand);

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