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Searched refs:AVIVO_D1GRPH_UPDATE (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rs600.c	`126 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); 131 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); 143 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) 151 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); 159 return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) &`
radeon_rv515.c	`371 tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]); 374 WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp); 421 tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]); 424 WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp); 432 tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]);`
radeon_rv770.c	`816 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); 821 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); 840 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) 848 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); 856 return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) &`
r500_reg.h	`421 #define AVIVO_D1GRPH_UPDATE 0x6144`
/src/sys/dev/pci/
radeonfbreg.h	`3774 #define AVIVO_D1GRPH_UPDATE 0x6144`

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