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  /src/external/bsd/pcc/dist/pcc/arch/i86/
order.c 160 static struct rspecial s[] = { { NEVER, AX }, { 0 } };
183 /* Force signed conversions into al/ax to use cbw */
187 { NLEFT, AL }, { NRES, AX },
188 { NEVER, AX }, { NEVER, AH}, {NEVER, AL },
209 { NLEFT, AX }, { NRES, AXDX },
210 { NEVER, AX }, { NEVER, DX },
218 { NEVER, AX }, { NEVER, DX },
233 { NEVER, AX }, { NEVER, DX },
234 { NLEFT, AX }, { NRES, AX },
    [all...]
macdefs.h 152 #define AX 000 /* Scratch and return register */
210 { AX, AXDX, AXCX, AXBX, AXSI, AXDI, -1 },\
211 { AX, AXDX, AXCX, AXBX, AXSI, AXDI, -1 },\
220 { AX, AL, AH, DX, DL, DH, AXCX, AXBX, AXSI, /* axdx */\
222 { AX, AL, AH, CX, CL, CH, AXDX, AXBX, AXSI, /* axcx */\
224 { AX, AL, AH, BX, BL, BH, AXDX, AXCX, AXSI, /* axbx */\
226 { AX, AL, AH, SI, AXDX, AXCX, AXBX, AXDI, /* axsi */\
228 { AX, AL, AH, DI, AXDX, AXCX, AXBX, AXSI, /* axdi */\
280 x == FLOAT || x == DOUBLE || x == LDOUBLE ? 31 : AX)
local2.c 130 printf(" mov ax, 8[bp]\n");
394 printf("\tmov ax, dx\n\txor dx,dx\n");
396 printf("\tmov dx, ax\n\txor ax,ax\n");
408 printf("\txor dx,dx\n\tmov al, dh\n\txor ax,ax\n");
410 printf("\txor ax,ax\n\tmov dh, al\n\txor dx,dx\n");
415 d[0] = "l", d[1] = "ax", d[2] = "dx"
    [all...]
code.c 99 /* put hidden arg in ax on return */
102 regno(p) = AX;
107 static TWORD regpregs[] = { AX, DX, CX };
284 r = regcvt == 0 ? AX : regcvt == 1 ? DX : CX;
  /src/external/gpl3/binutils/dist/gas/config/
rl78-parse.y 150 %type <regno> A X B C D E H L AX BC DE HL
156 %token A X B C D E H L AX BC DE HL
250 | addsubw AX ',' '#' EXPR
253 | addsubw AX ',' regw
256 | addsubw AX ',' EXPR {SA($4)}
259 | addsubw AX ',' opt_es '!' EXPR
262 | addsubw AX ',' opt_es '[' HL '+' EXPR ']'
265 | addsubw AX ',' opt_es '[' HL ']'
336 | BR AX
437 | oneclrw AX
    [all...]
rl78-parse.h 65 AX = 266, /* AX */
190 #define AX 266
  /src/external/gpl3/binutils.old/dist/gas/config/
rl78-parse.y 150 %type <regno> A X B C D E H L AX BC DE HL
156 %token A X B C D E H L AX BC DE HL
250 | addsubw AX ',' '#' EXPR
253 | addsubw AX ',' regw
256 | addsubw AX ',' EXPR {SA($4)}
259 | addsubw AX ',' opt_es '!' EXPR
262 | addsubw AX ',' opt_es '[' HL '+' EXPR ']'
265 | addsubw AX ',' opt_es '[' HL ']'
336 | BR AX
437 | oneclrw AX
    [all...]
rl78-parse.h 65 AX = 266, /* AX */
190 #define AX 266
  /src/external/gpl3/binutils/dist/opcodes/
rl78-decode.opc 192 /* Word registers, not including AX. */
271 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
274 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
277 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SRW(rw); Fzac;
283 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
385 /** 0110 0001 1100 1011 br ax */
386 ID(branch); DR(AX);
478 ID(mov); DR(AX); SC(0);
537 ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac
    [all...]
rl78-decode.c 193 /* Word registers, not including AX. */
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
250 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
265 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
461 ID(mov); W(); DRW(ra); SR(AX);
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
656 ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
671 ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac
    [all...]
  /src/external/gpl3/binutils.old/dist/opcodes/
rl78-decode.opc 192 /* Word registers, not including AX. */
271 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
274 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
277 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SRW(rw); Fzac;
283 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
385 /** 0110 0001 1100 1011 br ax */
386 ID(branch); DR(AX);
478 ID(mov); DR(AX); SC(0);
537 ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac
    [all...]
rl78-decode.c 193 /* Word registers, not including AX. */
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
250 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
265 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
461 ID(mov); W(); DRW(ra); SR(AX);
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
656 ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
671 ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac
    [all...]
  /src/external/gpl3/gdb.old/dist/opcodes/
rl78-decode.opc 192 /* Word registers, not including AX. */
271 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
274 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
277 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SRW(rw); Fzac;
283 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
385 /** 0110 0001 1100 1011 br ax */
386 ID(branch); DR(AX);
478 ID(mov); DR(AX); SC(0);
537 ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac
    [all...]
rl78-decode.c 193 /* Word registers, not including AX. */
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
250 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
265 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
461 ID(mov); W(); DRW(ra); SR(AX);
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
656 ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
671 ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac
    [all...]
  /src/external/gpl3/gdb/dist/opcodes/
rl78-decode.opc 192 /* Word registers, not including AX. */
271 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
274 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
277 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SRW(rw); Fzac;
283 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
385 /** 0110 0001 1100 1011 br ax */
386 ID(branch); DR(AX);
478 ID(mov); DR(AX); SC(0);
537 ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac
    [all...]
rl78-decode.c 193 /* Word registers, not including AX. */
235 ID(add); W(); DR(AX); SRW(rw); Fzac;
250 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
265 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
280 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
461 ID(mov); W(); DRW(ra); SR(AX);
481 ID(mov); W(); DR(AX); SRW(ra);
641 ID(sub); W(); DR(AX); SRW(rw); Fzac;
656 ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
671 ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac
    [all...]
  /src/external/bsd/libpcap/dist/msdos/
pkt_rx1.s 71 ; 1st time (AX=0) it requests an address where to put the packet
73 ; 2nd time (AX=1) the packet has been copied to this location (DS:SI)
93 cmp ax, 0 ; first call? (AX=0)
94 jne @post ; AX=1: second call, do post process
103 mov ax, [_rxInOfs]
104 add ax, RX_SIZE
105 cmp ax, LAST_OFS
107 mov ax, offset _pktRxBuf
109 cmp ax, [_rxOutOfs
    [all...]
pkt_rx0.asm 96 mov ax, _rxInOfs ;; DI = current in-offset
97 add ax, SIZE RX_ELEMENT ;; point to next _pktRxBuf buffer
98 cmp ax, LAST_OFS ;; pointing past last ?
100 lea ax, _pktRxBuf ;; yes, point to 1st buffer
102 @noWrap: cmp ax, _rxOutOfs ;; in-ofs = out-ofs ?
105 mov newInOffset, ax ;; remember new input offset
115 ; 1st time (AX=0) it requests an address where to put the packet
117 ; 2nd time (AX=1) the packet has been copied to this location (DS:SI)
142 cmp ax, 0 ; first call? (AX=0
    [all...]
  /src/external/gpl3/gcc/dist/libgcc/config/rl78/
mulsi3.S 31 ; AX op2L res32L res32H
38 ; AX op2L
54 movw ax, r16
55 push ax
56 movw ax, r18
57 push ax
60 push ax
64 clrw ax
65 movw r8, ax
66 movw r16, ax
    [all...]
  /src/external/gpl3/gcc.old/dist/libgcc/config/rl78/
mulsi3.S 31 ; AX op2L res32L res32H
38 ; AX op2L
54 movw ax, r16
55 push ax
56 movw ax, r18
57 push ax
60 push ax
64 clrw ax
65 movw r8, ax
66 movw r16, ax
    [all...]
  /src/sys/arch/i386/include/
bioscall.h 64 #define AX r_ax.biosreg_half[BIOSREG_LO]
  /src/external/gpl3/gcc.old/dist/libphobos/libdruntime/core/internal/
atomic.d 21 AX, BX, CX, DX, DI, SI, R8, R9
25 [ "AL", "AX", "EAX", "RAX" ],
132 enum ResReg = SizedReg!(AX, T);
151 enum ResReg = SizedReg!(AX, T);
246 enum ValReg = SizedReg!(AX, T);
269 enum ResReg = result ? SizedReg!(AX, T) : null;
299 enum ValReg = SizedReg!(AX, T);
322 enum ResReg = result ? SizedReg!(AX, T) : null;
350 enum Cmp = SizedReg!(AX, T);
408 enum Res = SizedReg!(AX, T)
    [all...]
  /src/external/gpl3/gcc.old/dist/libphobos/src/std/math/
exponential.d 1368 mov AX, [ESP+4+8]; // AX = exponent and sign
1375 and AX, 0x7FFF; // drop sign bit
1376 cmp AX, 0x401D; // avoid InvalidException in fist
1388 mov [ESP+8+8],AX;
1401 fstsw AX;
1402 test AX, 0x0400; // NaN_or_zero, but we already know x != 0
1404 test AX, 0x0200;
1435 mov AX,[RCX+8]; // AX = exponent and sig
    [all...]
trigonometry.d 224 fstsw AX ;
229 fstsw AX ;
237 fstsw AX ;
273 fstsw AX ;
278 fstsw AX ;
286 fstsw AX ;
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
X86MCTargetDesc.cpp 95 {codeview::RegisterId::AX, X86::AX},
627 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
639 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
676 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
677 return X86::AX;
712 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:
748 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX:

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