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    Searched refs:AZ_F0_CODEC_PIN0_CONTROL_RESPONSE_LIPSYNC (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_evergreen_hdmi.c	121 WREG32_ENDPOINT(0, AZ_F0_CODEC_PIN0_CONTROL_RESPONSE_LIPSYNC, tmp);
evergreend.h	773 #define AZ_F0_CODEC_PIN0_CONTROL_RESPONSE_LIPSYNC 0x5fe8

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