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Searched
refs:Alternate
(Results
1 - 7
of
7
) sorted by relevancy
/src/external/apache2/llvm/dist/clang/lib/Analysis/
ThreadSafetyTIL.cpp
219
// Walk the
alternate
and current candidate back to find a common ancestor.
220
auto *
Alternate
= Pred;
221
while (
Alternate
!= Candidate) {
222
if (Candidate->BlockID >
Alternate
->BlockID)
225
Alternate
=
Alternate
->DominatorNode.Parent;
246
// Walk the
alternate
and current candidate back to find a common ancestor.
247
auto *
Alternate
= Succ;
248
while (
Alternate
!= Candidate) {
249
if (Candidate->BlockID <
Alternate
->BlockID
[
all
...]
/src/sys/arch/atari/stand/xxboot/ahdi-sdb00t/
sdb00t.ahdi.S
46
btst #3,%d0 |
Alternate
?
/src/sys/arch/atari/stand/xxboot/ahdi-wdb00t/
wdb00t.ahdi.S
46
btst #3,%d0 |
Alternate
?
/src/sys/arch/atari/stand/xxboot/sdboot/
sdboot.S
58
1: btst #3,%d0 |
Alternate
?
/src/sys/arch/atari/stand/xxboot/wdboot/
wdboot.S
53
0: btst #3,%d0 |
Alternate
?
/src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachineScheduler.cpp
3796
InstructionShuffler(bool
alternate
, bool topdown)
3797
: IsAlternating(
alternate
), IsTopDown(topdown) {}
3842
bool
Alternate
= !ForceTopDown && !ForceBottomUp;
3847
C, std::make_unique<InstructionShuffler>(
Alternate
, TopDown));
/src/sys/arch/sparc64/sparc64/
locore.s
187
wrpr %g0, PSTATE_KERN, %pstate !
Alternate
Globals (AG) bit set to zero
196
wrpr %g0, PSTATE_KERN|PSTATE_AG, %pstate !
Alternate
Globals (AG) bit set to one
1322
* registers, interrupts are disabled, then we switch to an
alternate
set
1343
* all preliminary processing is done using the
alternate
globals
1354
* In order to properly handle nested traps without lossage,
alternate
1381
*
alternate
globals only.
1835
* We are on one of the
alternate
set of globals
1951
* We are on one of the
alternate
set of globals
1966
ldxa [%g3] ASI_DMMU, %g3 ! And put it into the non-MMU
alternate
regs
2091
wrpr %g0, PSTATE_KERN|PSTATE_AG, %pstate ! We need to save volatile stuff to
alternate
global
[
all
...]
Completed in 21 milliseconds
Indexes created Wed Aug 05 00:25:39 UTC 2026