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    Searched refs:AndReg (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SILowerControlFlow.cpp 376 Register AndReg = MRI->createVirtualRegister(BoolRC);
377 And = BuildMI(MBB, &MI, DL, TII->get(AndOpc), AndReg)
381 .addReg(AndReg)
384 LIS->createAndComputeVirtRegInterval(AndReg);
AMDGPURegisterBankInfo.cpp 878 Register AndReg = MRI.createVirtualRegister(WaveRC);
882 .addDef(AndReg)
885 CondReg = AndReg;
971 Register AndReg = MRI.createVirtualRegister(WaveRC);
975 .addDef(AndReg)
978 CondReg = AndReg;
SIInstrInfo.cpp 5193 Register AndReg = MRI.createVirtualRegister(BoolXExecRC);
5194 BuildMI(LoopBB, I, DL, TII.get(AndOpc), AndReg)
5197 CondReg = AndReg;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
CombinerHelper.cpp 3232 Register AndReg = MI.getOperand(1).getReg();
3240 if (!mi_match(AndReg, MRI, m_GAnd(m_Reg(X), m_Reg(Y)))) {
3241 std::swap(AndReg, SharedReg);
3242 if (!mi_match(AndReg, MRI, m_GAnd(m_Reg(X), m_Reg(Y))))
3247 if (!MRI.hasOneNonDBGUse(AndReg))
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 434 Register AndReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
438 BuildMI(BB, DL, TII.get(And), AndReg).addReg(CmpReg).addReg(SecondCmpReg);
439 CmpReg = AndReg;
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86FastISel.cpp 2269 Register AndReg = fastEmitInst_rr(Opc[1], VR128, CmpReg, LHSReg);
2271 Register OrReg = fastEmitInst_rr(Opc[3], VR128, AndNReg, AndReg);

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