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Searched
refs:ArgDescriptor
(Results
1 - 11
of
11
) sorted by relevancy
/src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUArgumentUsageInfo.h
23
struct
ArgDescriptor
{
40
constexpr
ArgDescriptor
(unsigned Val = 0, unsigned Mask = ~0u,
44
static constexpr
ArgDescriptor
createRegister(Register Reg,
46
return
ArgDescriptor
(Reg, Mask, false, true);
49
static constexpr
ArgDescriptor
createStack(unsigned Offset,
51
return
ArgDescriptor
(Offset, Mask, true, true);
54
static constexpr
ArgDescriptor
createArg(const
ArgDescriptor
&Arg,
56
return
ArgDescriptor
(Arg.Reg, Mask, Arg.IsStack, Arg.IsSet);
92
inline raw_ostream &operator<<(raw_ostream &OS, const
ArgDescriptor
&Arg)
[
all
...]
AMDGPUArgumentUsageInfo.cpp
26
void
ArgDescriptor
::print(raw_ostream &OS,
88
std::tuple<const
ArgDescriptor
*, const TargetRegisterClass *, LLT>
152
=
ArgDescriptor
::createRegister(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3);
153
AI.DispatchPtr =
ArgDescriptor
::createRegister(AMDGPU::SGPR4_SGPR5);
154
AI.QueuePtr =
ArgDescriptor
::createRegister(AMDGPU::SGPR6_SGPR7);
158
AI.ImplicitArgPtr =
ArgDescriptor
::createRegister(AMDGPU::SGPR8_SGPR9);
159
AI.DispatchID =
ArgDescriptor
::createRegister(AMDGPU::SGPR10_SGPR11);
162
AI.WorkGroupIDX =
ArgDescriptor
::createRegister(AMDGPU::SGPR12);
163
AI.WorkGroupIDY =
ArgDescriptor
::createRegister(AMDGPU::SGPR13);
164
AI.WorkGroupIDZ =
ArgDescriptor
::createRegister(AMDGPU::SGPR14)
[
all
...]
SIMachineFunctionInfo.cpp
79
ArgDescriptor
::createRegister(ScratchRSrcReg);
134
ArgDescriptor
::createRegister(AMDGPU::SGPR5);
201
ArgDescriptor
::createRegister(TRI.getMatchingSuperReg(
208
ArgInfo.DispatchPtr =
ArgDescriptor
::createRegister(TRI.getMatchingSuperReg(
215
ArgInfo.QueuePtr =
ArgDescriptor
::createRegister(TRI.getMatchingSuperReg(
223
=
ArgDescriptor
::createRegister(TRI.getMatchingSuperReg(
230
ArgInfo.DispatchID =
ArgDescriptor
::createRegister(TRI.getMatchingSuperReg(
237
ArgInfo.FlatScratchInit =
ArgDescriptor
::createRegister(TRI.getMatchingSuperReg(
244
ArgInfo.ImplicitBufferPtr =
ArgDescriptor
::createRegister(TRI.getMatchingSuperReg(
508
const
ArgDescriptor
&Arg)
[
all
...]
SIMachineFunctionInfo.h
580
ArgInfo.WorkGroupIDX =
ArgDescriptor
::createRegister(getNextSystemSGPR());
586
ArgInfo.WorkGroupIDY =
ArgDescriptor
::createRegister(getNextSystemSGPR());
592
ArgInfo.WorkGroupIDZ =
ArgDescriptor
::createRegister(getNextSystemSGPR());
598
ArgInfo.WorkGroupInfo =
ArgDescriptor
::createRegister(getNextSystemSGPR());
604
void setWorkItemIDX(
ArgDescriptor
Arg) {
608
void setWorkItemIDY(
ArgDescriptor
Arg) {
612
void setWorkItemIDZ(
ArgDescriptor
Arg) {
618
=
ArgDescriptor
::createRegister(getNextSystemSGPR());
624
ArgInfo.PrivateSegmentWaveByteOffset =
ArgDescriptor
::createRegister(Reg);
699
std::tuple<const
ArgDescriptor
*, const TargetRegisterClass *, LLT
[
all
...]
AMDGPUCallLowering.cpp
782
const
ArgDescriptor
*OutgoingArg;
791
const
ArgDescriptor
*IncomingArg;
818
const
ArgDescriptor
*OutgoingArg;
840
const
ArgDescriptor
*IncomingArgX = std::get<0>(WorkitemIDX);
841
const
ArgDescriptor
*IncomingArgY = std::get<0>(WorkitemIDY);
842
const
ArgDescriptor
*IncomingArgZ = std::get<0>(WorkitemIDZ);
877
ArgDescriptor
IncomingArg =
ArgDescriptor
::createArg(
AMDGPULegalizerInfo.h
94
const
ArgDescriptor
*Arg,
AMDGPUISelLowering.h
25
struct
ArgDescriptor
;
312
const
ArgDescriptor
&Arg) const;
AMDGPUTargetMachine.cpp
1308
ArgDescriptor
&Arg, unsigned UserSGPRs,
1322
Arg =
ArgDescriptor
::createRegister(Reg);
1324
Arg =
ArgDescriptor
::createStack(A->StackOffset);
1327
Arg =
ArgDescriptor
::createArg(Arg, A->Mask.getValue());
SIISelLowering.cpp
1617
const
ArgDescriptor
*InputPtrReg;
1766
const
ArgDescriptor
*Reg;
1837
Info.setWorkItemIDX(
ArgDescriptor
::createRegister(Reg, Mask));
1843
Info.setWorkItemIDY(
ArgDescriptor
::createRegister(AMDGPU::VGPR0,
1850
Info.setWorkItemIDY(
ArgDescriptor
::createRegister(Reg));
1857
Info.setWorkItemIDZ(
ArgDescriptor
::createRegister(AMDGPU::VGPR0,
1864
Info.setWorkItemIDZ(
ArgDescriptor
::createRegister(Reg));
1873
static
ArgDescriptor
allocateVGPR32Input(CCState &CCInfo, unsigned Mask = ~0u,
1874
ArgDescriptor
Arg =
ArgDescriptor
()) {
[
all
...]
AMDGPULegalizerInfo.cpp
2721
const
ArgDescriptor
*Arg,
2755
const
ArgDescriptor
*Arg;
AMDGPUISelLowering.cpp
4169
const
ArgDescriptor
&Arg) const {
Completed in 62 milliseconds
Indexes created Wed Aug 12 00:25:48 UTC 2026