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    Searched refs:ArgOffset (Results 1 - 17 of 17) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/DIA/
DIASession.cpp 162 DWORD ArgSection, ArgOffset = 0;
163 if (S_OK == Session->addressForVA(VA, &ArgSection, &ArgOffset)) {
165 Offset = static_cast<uint32_t>(ArgOffset);
173 DWORD ArgSection, ArgOffset = 0;
174 if (S_OK == Session->addressForRVA(RVA, &ArgSection, &ArgOffset)) {
176 Offset = static_cast<uint32_t>(ArgOffset);
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/
MemorySanitizer.cpp 1550 /// Shadow = ParamTLS+ArgOffset.
1552 int ArgOffset) {
1554 if (ArgOffset)
1555 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset));
1562 int ArgOffset) {
1566 if (ArgOffset)
1567 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset));
1677 unsigned ArgOffset = 0;
1694 bool Overflow = ArgOffset + Size > kParamTLSSize;
1700 Value *Base = getShadowPtrForArgument(&FArg, EntryIRB, ArgOffset);
    [all...]
DataFlowSanitizer.cpp 610 /// Shadow = ArgTLS+ArgOffset.
611 Value *getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB);
1727 Value *DFSanFunction::getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB) {
1729 if (ArgOffset)
1730 Base = IRB.CreateAdd(Base, ConstantInt::get(DFS.IntptrTy, ArgOffset));
1790 unsigned ArgOffset = 0;
1801 ArgOffset += alignTo(Size, ShadowTLSAlignment);
1802 if (ArgOffset > ArgTLSSize)
1807 if (ArgOffset + Size > ArgTLSSize)
1812 Value *ArgShadowPtr = getArgTLS(FArg.getType(), ArgOffset, IRB)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPULegalizerInfo.cpp 4016 unsigned ArgOffset,
4024 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I);
4047 !MI.getOperand(ArgOffset + I + 1).isReg()) {
4054 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()})
4117 const unsigned ArgOffset = NumDefs + 1;
4135 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg());
4137 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg());
4143 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm();
4170 MI.getOperand(ArgOffset + Intr->DMaskIndex).setImm(DMask);
4198 if (mi_match(MI.getOperand(ArgOffset + Intr->LodIndex).getReg(), *MRI
    [all...]
AMDGPUCallLowering.cpp 522 uint64_t ArgOffset = alignTo(ExplicitArgOffset, ABIAlign) + BaseOffset;
530 Align Alignment = commonAlignment(KernArgBaseAlign, ArgOffset);
538 lowerParameterPtr(VRegs[i][0], B, ArgTy, ArgOffset);
542 lowerParameterPtr(PtrReg, B, ArgTy, ArgOffset);
553 lowerParameter(B, ArgTy, ArgOffset, Alignment, ArgReg);
AMDGPUInstructionSelector.cpp 1480 const unsigned ArgOffset = MI.getNumExplicitDefs() + 1;
1491 Unorm = MI.getOperand(ArgOffset + Intr->UnormIndex).getImm() != 0;
1496 if (!parseTexFail(MI.getOperand(ArgOffset + Intr->TexFailCtrlIndex).getImm(),
1500 const int Flags = MI.getOperand(ArgOffset + Intr->NumArgs).getImm();
1531 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm();
1562 const MachineOperand &Lod = MI.getOperand(ArgOffset + Intr->LodIndex);
1571 const MachineOperand &Lod = MI.getOperand(ArgOffset + Intr->MipIndex);
1589 unsigned CPol = MI.getOperand(ArgOffset + Intr->CachePolicyIndex).getImm();
1599 MachineOperand &AddrOp = MI.getOperand(ArgOffset + I);
1665 MachineOperand &SrcOp = MI.getOperand(ArgOffset + Intr->VAddrStart + I)
    [all...]
SIISelLowering.cpp 1725 unsigned ArgOffset = VA.getLocMemOffset();
1728 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, true);
5984 const unsigned ArgOffset = WithChain ? 2 : 1;
6009 cast<ConstantSDNode>(Op.getOperand(ArgOffset + Intr->DMaskIndex));
6055 unsigned VAddrEnd = ArgOffset + Intr->VAddrEnd;
6061 Op.getOperand(ArgOffset + Intr->LodIndex))) {
6072 Op.getOperand(ArgOffset + Intr->MipIndex))) {
6082 VAddrs.push_back(Op.getOperand(ArgOffset + I));
6086 Op.getOperand(ArgOffset + Intr->GradientStart).getSimpleValueType();
6091 VAddrVT = Op.getOperand(ArgOffset + Intr->CoordStart).getSimpleValueType()
    [all...]
AMDGPUISelLowering.cpp 1034 uint64_t ArgOffset = alignTo(ExplicitArgOffset, Alignment) + ExplicitOffset;
1046 ComputeValueVTs(*this, DL, BaseArgTy, ValueVTs, &Offsets, ArgOffset);
4194 uint64_t ArgOffset = alignTo(MFI->getExplicitKernArgSize(), Alignment) +
4198 return ArgOffset;
4200 return ArgOffset + 4;
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 3869 /// stack slot (instead of being passed in registers). ArgOffset,
3874 unsigned ParamAreaSize, unsigned &ArgOffset,
3882 ArgOffset = alignTo(ArgOffset, Alignment);
3885 if (ArgOffset >= LinkageSize + ParamAreaSize)
3889 ArgOffset += CalculateStackSlotSize(ArgVT, Flags, PtrByteSize);
3891 ArgOffset = ((ArgOffset + PtrByteSize - 1)/PtrByteSize) * PtrByteSize;
3894 if (ArgOffset > LinkageSize + ParamAreaSize)
4074 unsigned ArgOffset = VA.getLocMemOffset()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 539 unsigned ArgOffset = CCInfo.getNextStackOffset();
541 ArgOffset += StackOffset;
543 assert(!ArgOffset);
544 ArgOffset = 68+4*NumAllocated;
548 FuncInfo->setVarArgsFrameOffset(ArgOffset);
557 int FrameIdx = MF.getFrameInfo().CreateFixedObject(4, ArgOffset,
563 ArgOffset += 4;
658 unsigned ArgOffset = CCInfo.getNextStackOffset();
661 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgArea +
668 for (; ArgOffset < 6*8; ArgOffset += 8)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.h 883 unsigned InRegsParamRecordIdx, int ArgOffset,
888 unsigned ArgOffset, unsigned TotalArgRegsSaveSize,
ARMISelLowering.cpp 4142 int ArgOffset, unsigned ArgSize) const {
4167 ArgOffset = -4 * (ARM::R4 - RBegin);
4170 int FrameIndex = MFI.CreateFixedObject(ArgSize, ArgOffset, false);
4194 unsigned ArgOffset,
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZFrameLowering.cpp 335 int64_t ArgOffset = MFFrame.getObjectOffset(I) +
337 MaxArgOffset = std::max(MaxArgOffset, ArgOffset);
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelLowering.cpp 498 unsigned ArgOffset = ArgLocs.size() * 8;
501 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgsBaseOffset);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 18186 int ArgOffset;
18188 std::tie(ArgOffset, ArgVal) = ArgWorkList.pop_back_val();
18191 ElementOffset = ArgOffset;
18198 ArgOffset + ArgVal.getValueType().getVectorNumElements();
18207 assert(CurrentArgOffset == ArgOffset);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 4938 unsigned ArgOffset = VA.getLocMemOffset();
4948 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset + BEAlign, true);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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