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    Searched refs:BECC_PMISR (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/xscale/
becc_pci.c	241 reg = BECC_CSR_READ(BECC_PMISR); 247 BECC_CSR_WRITE(BECC_PMISR, reg & 0x000f000d); 248 reg = BECC_CSR_READ(BECC_PMISR);
beccreg.h	91 #define BECC_PMISR 0x0100 /* PCI master interrupt status */

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